Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2003
10/21/2003US6635588 Method for laser thermal processing using thermally induced reflectivity switch
10/21/2003US6635587 Method for producing czochralski silicon free of agglomerated self-interstitial defects
10/21/2003US6635586 Stepped pattern using polysilazane in solution state, pre-bake to remove solvent ingredients in the insulation layer, hard bake process, and annealing
10/21/2003US6635585 Method for forming patterned polyimide layer
10/21/2003US6635584 Versatile system for forming uniform wafer surfaces
10/21/2003US6635583 Silicon carbide deposition for use as a low-dielectric constant anti-reflective coating
10/21/2003US6635582 Method of manufacturing semiconductor device
10/21/2003US6635581 Method for forming a thin-film transistor
10/21/2003US6635580 Apparatus and method for controlling wafer temperature in a plasma etcher
10/21/2003US6635579 First power for shortening warm-up time, second power < first power, to perform etching, and a third power, which is between the first and second for cleaning
10/21/2003US6635578 Method of operating a dual chamber reactor with neutral density decoupled from ion density
10/21/2003US6635577 Method for reducing topography dependent charging effects in a plasma enhanced semiconductor wafer processing system
10/21/2003US6635576 Method of fabricating borderless contact using graded-stair etch stop layers
10/21/2003US6635575 Methods and apparatus to enhance properties of Si-O-C low K films
10/21/2003US6635574 Method of removing material from a semiconductor substrate
10/21/2003US6635573 Method of detecting an endpoint during etching of a material within a recess
10/21/2003US6635572 Method of substrate silicon removal for integrated circuit devices
10/21/2003US6635571 Depositing aluminum using plasma deposition with organoaluminum as source, repeating to form an aluminum thin film, and further oxidizing using oxygen plasma to form aluminum oxide film thus obtaining aluminum oxide of high
10/21/2003US6635570 PECVD and CVD processes for WNx deposition
10/21/2003US6635569 Method of passivating and stabilizing a Ti-PECVD process chamber and combined Ti-PECVD/TiN-CVD processing method and apparatus
10/21/2003US6635568 Refractory metal roughness reduction using high temperature anneal in hydrides or organo-silane ambients
10/21/2003US6635567 Method of producing alignment marks
10/21/2003US6635566 Method of making metallization and contact structures in an integrated circuit
10/21/2003US6635565 Method of cleaning a dual damascene structure
10/21/2003US6635564 Semiconductor structure and method of fabrication including forming aluminum columns
10/21/2003US6635563 Method of manufacturing semiconductor device
10/21/2003US6635562 Methods and solutions for cleaning polished aluminum-containing layers
10/21/2003US6635561 Semiconductor device, and method of manufacturing the semiconductor device
10/21/2003US6635559 Formation of insulating aluminum oxide in semiconductor substrates
10/21/2003US6635558 Semiconductor processing methods of forming a contact opening to a conductive line and methods of forming substrate active area source/drain regions
10/21/2003US6635556 Method of preventing autodoping
10/21/2003US6635555 Method of controlling crystallographic orientation in laser-annealed polycrystalline silicon films
10/21/2003US6635554 Systems and methods using sequential lateral solidification for producing single or polycrystalline silicon thin films at low temperatures
10/21/2003US6635553 Microelectronic assemblies with multiple leads
10/21/2003US6635552 Methods of forming semiconductor constructions
10/21/2003US6635551 Deep trench isolation for reducing soft errors in integrated circuits
10/21/2003US6635550 Semiconductor on insulator device architecture and method of construction
10/21/2003US6635548 Capacitor and method for forming same
10/21/2003US6635547 DRAM capacitor formulation using a double-sided electrode
10/21/2003US6635546 Method and manufacturing MRAM offset cells in a damascene structure
10/21/2003US6635545 Transistor is produced such that connection region of its base is provided with silicide layer, so that base resistance of bipolar transistor is small
10/21/2003US6635544 Method of fabricating a high-voltage transistor with a multi-layered extended drain structure
10/21/2003US6635543 SOI hybrid structure with selective epitaxial growth of silicon
10/21/2003US6635542 Compact body for silicon-on-insulator transistors requiring no additional layout area
10/21/2003US6635541 Method for annealing using partial absorber layer exposed to radiant energy and article made with partial absorber layer
10/21/2003US6635540 Method for using thin spacers and oxidation in gate oxides
10/21/2003US6635539 Method for fabricating a MOS transistor using a self-aligned silicide technique
10/21/2003US6635538 Method of manufacturing a semiconductor device
10/21/2003US6635537 Method of fabricating gate oxide
10/21/2003US6635536 Method for manufacturing semiconductor memory device
10/21/2003US6635535 Forming metal-oxide field effect transistor comprising highly conductive titanium silicide or platinum silicide; thyratron tubes
10/21/2003US6635534 Method of manufacturing a trench MOSFET using selective growth epitaxy
10/21/2003US6635533 Method of fabricating flash memory
10/21/2003US6635532 Method for fabricating NOR type flash memory device
10/21/2003US6635531 Method of manufacturing non-volatile semiconductor memory device
10/21/2003US6635530 Methods of forming gated semiconductor assemblies
10/21/2003US6635529 Method of fabricating semiconductor device
10/21/2003US6635528 Method of planarizing a conductive plug situated under a ferroelectric capacitor
10/21/2003US6635527 Metal-insulator-metal capacitor
10/21/2003US6635526 Structure and method for dual work function logic devices in vertical DRAM process
10/21/2003US6635525 Method of making backside buried strap for SOI DRAM trench capacitor
10/21/2003US6635524 Method for fabricating capacitor of semiconductor memory device
10/21/2003US6635523 Semiconductor device and method of manufacturing the same
10/21/2003US6635522 Method of forming a MOS transistor in a semiconductor device and a MOS transistor fabricated thereby
10/21/2003US6635521 CMOS-type semiconductor device and method of fabricating the same
10/21/2003US6635520 Operation method of semiconductor devices
10/21/2003US6635517 Use of disposable spacer to introduce gettering in SOI layer
10/21/2003US6635516 Substrate dropping prevention mechanism and substrate inspection device provided therewith
10/21/2003US6635515 Method of manufacturing a semiconductor device having signal line above main ground or main VDD line
10/21/2003US6635514 Compliant package with conductive elastomeric posts
10/21/2003US6635512 Method of producing a semiconductor device by dividing a semiconductor wafer into separate pieces of semiconductor chips
10/21/2003US6635510 Method of making a parylene coating for soldermask
10/21/2003US6635508 Organic semiconductor device and process of manufacturing the same
10/21/2003US6635504 Method of manufacturing organic EL display
10/21/2003US6635503 Cluster packaging of light emitting diodes
10/21/2003US6635501 Low temperature cobalt silicidation process monitor
10/21/2003US6635500 Treatment of substrates
10/21/2003US6635499 MRAM sense layer isolation
10/21/2003US6635498 Method of patterning a FeRAM capacitor with a sidewall during bottom electrode etch
10/21/2003US6635497 Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing
10/21/2003US6635496 Plate-through hard mask for MRAM devices
10/21/2003US6635495 Infrared detecting element, infrared two-dimensional image sensor, and method of manufacturing the same
10/21/2003US6635494 Method of forming a two-dimensionally arrayed quantum device using a metalloprotein complex as a quantum-dot mask array
10/21/2003US6635410 Metallizing method for dielectrics
10/21/2003US6635407 Two pass process for producing a fine pitch lead frame by etching
10/21/2003US6635406 Integrated circuits, consisting substantially of organic insulators and conductors
10/21/2003US6635404 Structure and process method of gamma gate for HEMT
10/21/2003US6635403 Lithography apparatus, lithography method and method of manufacturing master print for transfer
10/21/2003US6635402 Electron beam microlithography; resolution; improved measuring and adjusting the distribution of current density
10/21/2003US6635401 Resist compositions with polymers having 2-cyano acrylic monomer
10/21/2003US6635395 Method for exposing a layout comprising multiple layers on a wafer
10/21/2003US6635392 Computer corrected pattern
10/21/2003US6635389 Through machining or mold forming; high resolution lithography
10/21/2003US6635348 Aerosol method and apparatus, particulate products, and electronic devices made therefrom
10/21/2003US6635335 Etching methods and apparatus and substrate assemblies produced therewith
10/21/2003US6635323 Raw material for production of GaAs crystals
10/21/2003US6635310 Semiconductors, doping with PH3
10/21/2003US6635228 Reactor including inner electrode having outer surface, outer electrode having inner surface, liquid dielectric configured to flow as film over outer surface of inner electrode and inner surface of outer electrode, preventing arcing
10/21/2003US6635209 Method of encapsulating a substrate-based package assembly without causing mold flash
10/21/2003US6635186 Chemical mechanical polishing composition and process
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