Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2004
03/09/2004US6703629 Charged beam exposure apparatus having blanking aperture and basic figure aperture
03/09/2004US6703626 Defect observed with the atomic force microscope (afm) and a pattern putting together the shape and position of the defect is extracted from and afm image. the extracted pattern is then converted to a shape format for a for an ion beam defect
03/09/2004US6703623 Electron beam proximity exposure apparatus
03/09/2004US6703592 System of controlling the temperature of a processing chamber
03/09/2004US6703589 Apparatus and process for heat-treating at least one material being processed in a heat-treatment space of a heat-treatment container under a specific process-gas atmosphere of at least one process gas
03/09/2004US6703582 Energy-efficient method and system for processing target material using an amplified, wavelength-shifted pulse train
03/09/2004US6703560 Stress resistant land grid array (LGA) module and method of forming the same
03/09/2004US6703328 Semiconductor device manufacturing method
03/09/2004US6703327 High-pressure anneal process for integrated circuits
03/09/2004US6703326 High-pressure anneal process for integrated circuits
03/09/2004US6703325 High pressure anneal process for integrated circuits
03/09/2004US6703324 Mechanically reinforced highly porous low dielectric constant films
03/09/2004US6703323 Method of inhibiting pattern collapse using a relacs material
03/09/2004US6703322 Method of forming multiple oxide layers with different thicknesses in a linear nitrogen doping process
03/09/2004US6703321 Low thermal budget solution for PMD application using sacvd layer
03/09/2004US6703320 Successful and easy method to remove polysilicon film
03/09/2004US6703319 Compositions and methods for removing etch residue
03/09/2004US6703318 Method of planarizing a semiconductor die
03/09/2004US6703317 Method to neutralize charge imbalance following a wafer cleaning process
03/09/2004US6703316 Method and system for processing substrate
03/09/2004US6703315 Method of providing a shallow trench in a deep-trench device
03/09/2004US6703314 Method for fabricating semiconductor device
03/09/2004US6703312 Method of forming active devices of different gatelengths using lithographic printed gate images of same length
03/09/2004US6703311 Method for estimating capacitance of deep trench capacitors
03/09/2004US6703310 Semiconductor device and method of production of same
03/09/2004US6703309 Method of reducing oxidation of metal structures using ion implantation, and device formed by such method
03/09/2004US6703308 Method of inserting alloy elements to reduce copper diffusion and bulk diffusion
03/09/2004US6703307 Method of implantation after copper seed deposition
03/09/2004US6703306 Methods of fabricating integrated circuit memories including titanium nitride bit lines
03/09/2004US6703305 Semiconductor device having metallized interconnect structure and method of fabrication
03/09/2004US6703304 Dual damascene process using self-assembled monolayer and spacers
03/09/2004US6703303 Method of manufacturing a portion of a memory
03/09/2004US6703302 Method of making a low dielectric insulation layer
03/09/2004US6703301 Method of preventing tungsten plugs from corrosion
03/09/2004US6703300 Method for making multilayer electronic devices
03/09/2004US6703299 Underfill process for flip-chip device
03/09/2004US6703298 Self-aligned process for fabricating memory cells with two isolated floating gates
03/09/2004US6703297 Method of removing inorganic gate antireflective coating after spacer formation
03/09/2004US6703296 Method for forming metal salicide
03/09/2004US6703295 Method and apparatus for self-doping contacts to a semiconductor
03/09/2004US6703294 Method for producing a region doped with boron in a SiC-layer
03/09/2004US6703293 Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates
03/09/2004US6703292 Method of making a semiconductor wafer having a depletable multiple-region semiconductor material
03/09/2004US6703291 Selective NiGe wet etch for transistors with Ge body and/or Ge source/drain extensions
03/09/2004US6703289 Method for forming crystalline silicon layer and crystalline silicon semiconductor device
03/09/2004US6703288 Compound crystal and method of manufacturing same
03/09/2004US6703287 Production method for shallow trench insulation
03/09/2004US6703286 Metal bond pad for low-k inter metal dielectric
03/09/2004US6703285 Method for manufacturing capacitor structure, and method for manufacturing capacitor element
03/09/2004US6703284 Methods for fabricating a compound semiconductor protection device for low voltage and high speed data lines
03/09/2004US6703283 Discontinuous dielectric interface for bipolar transistors
03/09/2004US6703282 Method of reducing NMOS device current degradation via formation of an HTO layer as an underlying component of a nitride-oxide sidewall spacer
03/09/2004US6703281 Differential laser thermal process with disposable spacers
03/09/2004US6703279 Semiconductor device having contact of Si-Ge combined with cobalt silicide
03/09/2004US6703278 Method of forming layers of oxide on a surface of a substrate
03/09/2004US6703277 Reducing agent for high-K gate dielectric parasitic interfacial layer
03/09/2004US6703276 Passivated silicon carbide devices with low leakage current and method of fabricating
03/09/2004US6703275 Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell
03/09/2004US6703274 Buried strap with limited outdiffusion and vertical transistor DRAM
03/09/2004US6703273 Aggressive capacitor array cell layout for narrow diameter DRAM trench capacitor structures via SOI technology
03/09/2004US6703272 Methods of forming spaced conductive regions, and methods of forming capacitor constructions
03/09/2004US6703271 Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer
03/09/2004US6703270 Method of manufacturing a semiconductor device
03/09/2004US6703269 Method to form gate conductor structures of dual doped polysilicon
03/09/2004US6703268 Method to fabricate an intrinsic polycrystalline silicon film
03/09/2004US6703267 Method of manufacturing thin film transistor
03/09/2004US6703266 Method for fabricating thin film transistor array and driving circuit
03/09/2004US6703265 Semiconductor device and method of manufacturing the same
03/09/2004US6703264 Method of manufacturing a semiconductor device
03/09/2004US6703262 Method for planarizing circuit board and method for manufacturing semiconductor device
03/09/2004US6703261 Semiconductor device and manufacturing the same
03/09/2004US6703259 System and method for achieving planar alignment of a substrate during solder ball mounting for use in semiconductor fabrication
03/09/2004US6703255 Method for fabricating a III nitride film
03/09/2004US6703253 Method for producing semiconductor light emitting device and semiconductor light emitting device produced by such method
03/09/2004US6703251 Semiconductor wafer
03/09/2004US6703250 Method of controlling plasma etch process
03/09/2004US6703249 Method of fabricating magnetic random access memory operating based on tunnel magnetroresistance effect
03/09/2004US6703187 Method of forming a self-aligned twin well structure with a single mask
03/09/2004US6703183 (meth)acrylic acid adamantane or norbornane ester derivatives
03/09/2004US6703178 Comprises a polymer containing a novel lactone alicyclic unit; well-balanced outcome of etching resistance and substrate adhesion
03/09/2004US6703171 Photomask, the manufacturing method, a patterning method, and a semiconductor device manufacturing method
03/09/2004US6703169 Applying an organic antireflection coating over a metal-containing layer; applying a chemically-amplified positive tone or negative tone deep ultraviolet photoresist; baking; exposure to radiation; baking
03/09/2004US6703167 Calibration using scattering bars; lithography tools
03/09/2004US6703144 Heterointegration of materials using deposition and bonding
03/09/2004US6703133 Polyimide silicone resin, its solution composition, and polyimide silicone resin film
03/09/2004US6703092 Resin molded article for chamber liner
03/09/2004US6703075 Wafer treating method for making adhesive dies
03/09/2004US6703069 Under bump metallurgy for lead-tin bump over copper pad
03/09/2004US6702954 Chemical-mechanical polishing slurry and method
03/09/2004US6702950 Method for fabricating LC device using latent masking and delayed LOCOS techniques
03/09/2004US6702910 Process for producing a chip
03/09/2004US6702900 Wafer chuck for producing an inert gas blanket and method for using
03/09/2004US6702899 Vacuum processing apparatus
03/09/2004US6702898 Deposited film forming apparatus
03/09/2004US6702892 Production device for high-quality silicon single crystals
03/09/2004US6702865 Alignment processing mechanism and semiconductor processing device using it
03/09/2004US6702658 Wafer polishing apparatus utilizing an Oldham's coupling mechanism for the wafer carrier
03/09/2004US6702652 Cracking prevention
03/09/2004US6702651 Method and apparatus for conditioning a polishing pad
03/09/2004US6702647 Method and apparatus for wireless transfer of chemical-mechanical planarization measurements