Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2013
12/05/2013US20130323884 Three dimensional microelectronic components and fabrication methods for same
12/05/2013US20130323883 Device with through-silicon via (tsv) and method of forming the same
12/05/2013US20130323875 Methods of forming a through via structure
12/05/2013US20130323866 Method of laser irradiation, laser irradiation apparatus, and method of manufacturing a semiconductor device
12/05/2013US20130323865 Power light emitting die package with reflecting lens and the method of making the same
12/05/2013US20130323864 Semiconductor test equipment and method of testing and manufacturing semiconductor devices using the same
12/05/2013US20130323863 Method for Generating Graphene Structures
12/05/2013US20130323862 Led package manufacturing system and resin coating method for use in led package manufacturing system
12/05/2013US20130323861 Process of treating defects during the bonding of wafers
12/05/2013US20130323860 Substrate support providing gap height and planarization adjustment in plasma processing chamber
12/05/2013US20130323859 System and method of monitoring and controlling atomic layer deposition of tungsten
12/05/2013US20130323641 Photosenstive material and method of lithography
12/05/2013US20130323410 Post-deposition cleaning methods and formulations for substrates with cap layers
12/05/2013US20130323002 Transfer robot and equipment front end module including transfer robot
12/05/2013US20130322990 Loadport bridge for semiconductor fabrication tools
12/05/2013US20130322811 Method and structure providing optical isolation of a waveguide on a silicon-on-insulator substrate
12/05/2013US20130322481 Laser diodes including substrates having semipolar surface plane orientations and nonpolar cleaved facets
12/05/2013US20130322152 Circuitry including resistive random access memory storage cells and methods for forming same
12/05/2013US20130321974 Electrostatic chuck and method for manufacturing electrostatic chuck
12/05/2013US20130321973 Thin substrate electrostatic chuck system and method
12/05/2013US20130321962 Esd-robust i/o driver circuits
12/05/2013US20130321680 Manufacturing method for semiconductor device and semiconductor device
12/05/2013US20130321660 Semiconductor device and method of manufacturing the same
12/05/2013US20130321383 Pixel circuit, display device, and method of driving pixel circuit
12/05/2013US20130321250 Pixel circuit, display device, and method of driving pixel circuit
12/05/2013US20130321094 Isolator and isolator manufacturing method
12/05/2013US20130320952 Monolithically integrated hemt and current protection device
12/05/2013US20130320636 Substrate processing apparatus
12/05/2013US20130320572 Isolation Rings for Packages and the Method of Forming the Same
12/05/2013US20130320570 Electronic device for power applications
12/05/2013US20130320567 Batch process for three-dimensional integration
12/05/2013US20130320566 Integrated circuit packaging system with substrate and method of manufacture thereof
12/05/2013US20130320565 Interposer Die for Semiconductor Packaging
12/05/2013US20130320564 Avd hardmask for damascene patterning
12/05/2013US20130320563 Three dimensional memory structure
12/05/2013US20130320561 Plug via stacked structure, stacked substrate having via stacked structure and manufacturing method thereof
12/05/2013US20130320560 Distributed on-chip decoupling apparatus and method using package interconnect
12/05/2013US20130320558 Semiconductor device and method for manufacturing the same
12/05/2013US20130320557 Semiconductor package having reliable electrical connection and assembling method
12/05/2013US20130320556 Three Dimensional Integrated Circuit Structures and Hybrid Bonding Methods for Semiconductor Wafers
12/05/2013US20130320554 Semiconductor device and method of manufacturing thereof
12/05/2013US20130320550 Semiconductor device with air gap and method for fabricating the same
12/05/2013US20130320549 Semiconductor device with air gap and method for fabricating the same
12/05/2013US20130320548 Integrated circuit die assembly with heat spreader
12/05/2013US20130320547 Enabling package-on-package (pop) pad surface finishes on bumpless build-up layer (bbul) package
12/05/2013US20130320545 Hybrid copper interconnect structure and method of fabricating same
12/05/2013US20130320544 Corrosion/etching protection in integration circuit fabrications
12/05/2013US20130320543 Semiconductor device manufacturing method and semiconductor device
12/05/2013US20130320542 Method of fabricating a self-aligned buried bit line for a vertical channel dram
12/05/2013US20130320540 Semiconductor device and method for manufacturing the same
12/05/2013US20130320539 Method and Apparatus for Back End of Line Semiconductor Device Processing
12/05/2013US20130320538 Integrated Circuit Substrates Comprising Through-Substrate Vias And Methods Of Forming Through-Substrate Vias
12/05/2013US20130320537 Through silicon via (tsv) structure and process thereof
12/05/2013US20130320536 Integrated circuit including wire structure, related method and design structure
12/05/2013US20130320535 Three-dimensional system-level packaging methods and structures
12/05/2013US20130320533 3d system-level packaging methods and structures
12/05/2013US20130320530 Semiconductor device with redistributed contacts
12/05/2013US20130320529 Reactive bonding of a flip chip package
12/05/2013US20130320525 Integrated circuit packaging system with substrate and method of manufacture thereof
12/05/2013US20130320524 Design Scheme for Connector Site Spacing and Resulting Structures
12/05/2013US20130320523 Semiconductor Device and Method of Reflow Soldering for Conductive Column Structure in Flip Chip Package
12/05/2013US20130320522 Re-distribution Layer Via Structure and Method of Making Same
12/05/2013US20130320521 Releasable buried layer for 3-d fabrication and methods of manufacturing
12/05/2013US20130320520 Chemically altered carbosilanes for pore sealing applications
12/05/2013US20130320519 Semiconductor Device and Method of Backgrinding and Singulation of Semiconductor Wafer while Reducing Kerf Shifting and Protecting Wafer Surfaces
12/05/2013US20130320518 Wafer-level package and method of manufacturing the same
12/05/2013US20130320516 Semiconductor package and method of manufacturing the same
12/05/2013US20130320515 System, method and apparatus for leadless surface mounted semiconductor package
12/05/2013US20130320514 Package-in-Package for High Heat Dissipation Having Leadframes and Wire Bonds
12/05/2013US20130320513 Semiconductor package and fabrication method thereof
12/05/2013US20130320512 Semiconductor Device and Method of Manufacturing a Semiconductor Device
12/05/2013US20130320510 Durable, heat-resistant multi-layer coatings and coated articles
12/05/2013US20130320509 Moisture barrier coatings
12/05/2013US20130320508 Semiconductor device and method of manufacturing the same
12/05/2013US20130320505 Semiconductor reflow processing for high aspect ratio fill
12/05/2013US20130320503 Methods and devices for fabricating and assembling printable semiconductor elements
12/05/2013US20130320502 Semiconductor processing method and semiconductor structure
12/05/2013US20130320493 Capacitor for interposers and methods of manufacture thereof
12/05/2013US20130320490 Inductive element with interrupter region and method for forming
12/05/2013US20130320489 Semiconductor device and method for manufacturing the same
12/05/2013US20130320488 System and method for forming aluminum fuse for compatibility with copper beol interconnect scheme
12/05/2013US20130320487 Semiconductor Device with Trench Structures
12/05/2013US20130320484 Semiconductor device formation
12/05/2013US20130320483 Semiconductor-on-insulator (soi) substrates with ultra-thin soi layers and buried oxides
12/05/2013US20130320480 Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices
12/05/2013US20130320477 Method of etching of soi substrate, and back-illuminated photoelectric conversion module on soi substrate and process of manufacture thereof
12/05/2013US20130320475 Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus
12/05/2013US20130320466 Package for Damping Inertial Sensor
12/05/2013US20130320463 Package structure having mems element and fabrication method thereof
12/05/2013US20130320462 Adaptive charge balanced edge termination
12/05/2013US20130320460 Semiconductor device having fin structure and method of manufacturing the same
12/05/2013US20130320459 Semiconductor Isolation Structure with Air Gaps in Deep Trenches
12/05/2013US20130320456 Gate aligned contact and method to fabricate same
12/05/2013US20130320455 Semiconductor device with isolated body portion
12/05/2013US20130320453 Area scaling on trigate transistors
12/05/2013US20130320452 Semiconductor Device and Method of Forming the Same
12/05/2013US20130320451 Semiconductor device having non-orthogonal element
12/05/2013US20130320450 Middle in-situ doped sige junctions for pmos devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations
12/05/2013US20130320449 Late in-situ doped sige junctions for pmos devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations
12/05/2013US20130320446 Semiconductor structure and method for forming the same
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