Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2013
12/17/2013US8609518 Re-growing source/drain regions from un-relaxed silicon layer
12/17/2013US8609517 MOCVD for growing III-V compound semiconductors on silicon substrates
12/17/2013US8609516 Atmospheric pressure chemical vapor deposition method for producing an-N-semiconductive metal sulfide thin layer
12/17/2013US8609515 Dicing die bonding film, semiconductor wafer, and semiconductor device
12/17/2013US8609514 Process for the transfer of a thin film comprising an inclusion creation step
12/17/2013US8609513 Method for manufacturing semiconductor device
12/17/2013US8609512 Method for laser singulation of chip scale packages on glass substrates
12/17/2013US8609511 Semiconductor device manufacturing method, semiconductor device, and camera module
12/17/2013US8609510 Replacement metal gate diffusion break formation
12/17/2013US8609509 Superior integrity of high-k metal gate stacks by forming STI regions after gate metals
12/17/2013US8609508 Method of fabricating an integrated circuit having a strain inducing hollow trench isolation region
12/17/2013US8609507 Semiconductor device and method of manufacturing the same
12/17/2013US8609505 Method of forming MIM capacitor structure in FEOL
12/17/2013US8609504 3D via capacitor with a floating conductive plate for improved reliability
12/17/2013US8609503 Phase change memory device and fabrication method thereof
12/17/2013US8609502 Method of manufacturing semiconductor device including insulated gate bipolar transistor and diode
12/17/2013US8609501 Fluorine implant under isolation dielectric structures to improve bipolar transistor performance and matching
12/17/2013US8609500 Semiconductor device production method
12/17/2013US8609499 FinFETs and the methods for forming the same
12/17/2013US8609498 Transistor with embedded Si/Ge material having reduced offset and superior uniformity
12/17/2013US8609497 Method of dual EPI process for semiconductor device
12/17/2013US8609496 Method of fabricating semiconductor device comprising a dummy well
12/17/2013US8609495 Hybrid gate process for fabricating finfet device
12/17/2013US8609493 Method of fabricating semiconductor device
12/17/2013US8609492 Vertical memory cell
12/17/2013US8609491 Method for fabricating semiconductor device with buried bit lines
12/17/2013US8609490 Extended drain lateral DMOS transistor with reduced gate charge and self-aligned extended drain
12/17/2013US8609489 Methods of forming memory; and methods of forming vertical structures
12/17/2013US8609488 Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith
12/17/2013US8609487 Method of manufacturing semiconductor device
12/17/2013US8609486 Methods for fabricating deep trench capacitors
12/17/2013US8609485 Methods of forming efuse devices
12/17/2013US8609483 Method of building compensated isolated P-well devices
12/17/2013US8609482 Enhancing interface characteristics between a channel semiconductor alloy and a gate dielectric by an oxidation process
12/17/2013US8609481 Gate-all-around carbon nanotube transistor with selectively doped spacers
12/17/2013US8609480 Methods of forming isolation structures on FinFET semiconductor devices
12/17/2013US8609479 Gated-varactors
12/17/2013US8609478 Method for manufacturing semiconductor device
12/17/2013US8609477 Manufacturing method for array substrate with fringe field switching type thin film transistor liquid crystal display
12/17/2013US8609476 Manufacturing method of light emitting device
12/17/2013US8609475 Methods for forming nickel oxide films for use with resistive switching memory devices/US
12/17/2013US8609474 Method of manufacturing semiconductor device
12/17/2013US8609473 Method for fabricating a neo-layer using stud bumped bare die
12/17/2013US8609472 Process for fabricating electronic components using liquid injection molding
12/17/2013US8609471 Packaging an integrated circuit die using compression molding
12/17/2013US8609470 Semiconducting sheet
12/17/2013US8609469 Method of manufacturing semiconductor device
12/17/2013US8609468 Semiconductor device and method of manufacturing the same
12/17/2013US8609467 Lead frame and method for manufacturing circuit device using the same
12/17/2013US8609466 Cap and substrate electrical connection at wafer level
12/17/2013US8609465 Semiconductor device manufacturing method
12/17/2013US8609464 Method for shielding semiconductor device
12/17/2013US8609462 Methods for forming 3DIC package
12/17/2013US8609460 Semiconductor structure and fabricating method thereof
12/17/2013US8609457 Semiconductor device with DRAM bit lines made from same material as gate electrodes in non-memory regions of the device, and methods of making same
12/17/2013US8609456 Method for fabricating semiconductor layer having textured surface and method for fabricating solar cell
12/17/2013US8609455 Patterned glass cylindrical lens arrays for concentrated photovoltaic systems, and/or methods of making the same
12/17/2013US8609454 Self-assembly apparatus, device self-assembling method, and method of assembling thermoelectric devices
12/17/2013US8609453 Low cost solar cell manufacture method employing a reusable substrate
12/17/2013US8609452 Method and apparatus providing analytical device and operating method based on solid state image sensor
12/17/2013US8609451 Insitu epitaxial deposition of front and back junctions in single crystal silicon solar cells
12/17/2013US8609450 MEMS switches and fabrication methods
12/17/2013US8609447 Method of manufacturing surface emitting laser, and surface emitting laser, surface emitting laser array, optical scanning device and image forming apparatus
12/17/2013US8609446 Method and apparatus for accurate die-to-wafer bonding
12/17/2013US8609445 Optical transmission module and manufacturing method of the same
12/17/2013US8609444 Manufacturing method of mounting part of semiconductor light emitting element, manufacturing method of light emitting device, and semiconductor light emitting element
12/17/2013US8609443 Semiconductor device manufacturing method
12/17/2013US8609442 Vapor deposition method, vapor deposition device and organic EL display device
12/17/2013US8609441 Substrate comprising a mark
12/17/2013US8609440 Semiconductor device and method of manufacturing same
12/17/2013US8609439 Magnetic tunnel junction comprising a polarizing layer
12/17/2013US8609301 Mask, exposure apparatus and device manufacturing method
12/17/2013US8609178 Substrates for spatially selective micron and nanometer scale deposition and combinatorial modification and fabrication
12/17/2013US8608933 Copper electrodeposition in microelectronics
12/17/2013US8608903 Plasma processing apparatus and plasma processing method
12/17/2013US8608902 Plasma processing apparatus
12/17/2013US8608901 Process chamber cleaning method in substrate processing apparatus, substrate processing apparatus, and substrate processing method
12/17/2013US8608900 Plasma reactor with feed forward thermal control system using a thermal model for accommodating RF power changes or wafer temperature changes
12/17/2013US8608856 Sealing part and substrate processing apparatus
12/17/2013US8608854 CVD device
12/17/2013US8608422 Particle sticking prevention apparatus and plasma processing apparatus
12/17/2013US8608286 Method of forming inkjet nozzle chamber
12/17/2013US8607732 In-liquid plasma film-forming apparatus, electrode for in-liquid plasma, and film-forming method using in-liquid plasma
12/17/2013US8607447 Method for providing and connecting two contact areas of a semiconductor component or a substrate, and a substrate having two such connected contact areas
12/17/2013CA2444681C Nanoelectronic devices and circuits
12/15/2013CA2818040A1 Integrated circuit package and method of making same
12/12/2013WO2013185088A1 Enhancement-mode high electron mobility transistor structure and method of making same
12/12/2013WO2013184880A1 Use of conformal coating elastic cushion to reduce through silicon vias (tsv) stress in 3-dimensional integration
12/12/2013WO2013184850A2 Normally-off gallium nitride transistor with insulating gate and method of making same
12/12/2013WO2013184772A1 Graphene coated substrates and resulting composites
12/12/2013WO2013184760A1 Compact ampoule thermal management system
12/12/2013WO2013184693A1 Focus monitoring method using asymmetry embedded imaging target
12/12/2013WO2013184654A1 Ohmic contact to semiconductor layer
12/12/2013WO2013184632A1 Process to remove ni and nipt metal residues using low temperature aqua regia and sc2 clean
12/12/2013WO2013184606A1 Gated diode structure for eliminating rie damage from cap removal
12/12/2013WO2013184576A1 Bio-implantable hermetic integrated circuit device
12/12/2013WO2013184526A1 Ultra-large grain polycrystalline semiconductors through top-down aluminum induced crystallization (taic)
12/12/2013WO2013184349A1 Two-part retaining ring with interlock features
12/12/2013WO2013184314A1 Method of semiconductor film stabilization
12/12/2013WO2013184308A1 Dram with a nanowire access transistor
1 ... 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 ... 6590