Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2013
12/18/2013CN102138211B Body contact for SRAM cell comprising double-channel transistors
12/18/2013CN102130129B Layout structure of static random access memory (SRAM) and manufacturing method thereof
12/18/2013CN102130102B Electronic device and method of producing same
12/18/2013CN102130006B Method for preparing groove-type double-layer gate power metal oxide semiconductor (MOS) transistor
12/18/2013CN102113090B Relaxation and transfer of strained layers
12/18/2013CN102097388B Method for integrating photodiode in CMOS process
12/18/2013CN102034740B Semiconductor device and method for fabricating same
12/18/2013CN102017071B Methods of patterning conductor on substrate
12/18/2013CN101960629B Method for manufacturing magnetic tunnel junction device and apparatus for manufacturing magnetic tunnel junction device
12/18/2013CN101952968B Reverse-conducting semiconductor device and method for manufacturing such reverse-conducting semiconductor device
12/18/2013CN101937861B Method for manufacturing semiconductor substrate, and method for manufacturing semiconductor device
12/18/2013CN101878277B Chemical-mechanical polishing liquid
12/18/2013CN101868139B Vacuum nozzle control apparatus and head assembly for chip mounter having same
12/18/2013CN101764130B Semiconductor device and method of forming patterns for semiconductor device
12/18/2013CN101752427B Thin film transistor and display device
12/18/2013CN101726993B Bi-layer, tri-layer mask CD control
12/18/2013CN101674066B Method of forming integrated semiconductor device and structure therefor
12/18/2013CN101665922B Film deposition apparatus, substrate processing apparatus and film deposition method
12/18/2013CN101447405B Wafer transport system and device and method for placing or transporting wafer
12/18/2013CN101379214B Epitaxial deposition process and apparatus
12/17/2013US8612687 Latency-tolerant 3D on-chip memory organization
12/17/2013US8612038 Target object processing system and method of controlling the same
12/17/2013US8611457 Modified preamble structure for IEEE 802.11A extensions to allow for coexistence and interoperability between 802.11A devices and higher data rate, MIMO or otherwise extended devices
12/17/2013US8611130 Method for fabricating multi-resistive state memory devices
12/17/2013US8610871 Method for forming multilayer structure, method for manufacturing display panel, and display panel
12/17/2013US8610861 Liquid crystal display device and method of manufacturing the same
12/17/2013US8610289 Semiconductor component and method for producing a metal-semiconductor contact
12/17/2013US8610285 3D IC packaging structures and methods with a metal pillar
12/17/2013US8610284 Semiconductor device and electronic device
12/17/2013US8610275 Semiconductor contact structure including a spacer formed within a via and method of manufacturing the same
12/17/2013US8610272 Package structure with micro-electromechanical element and manufacturing method thereof
12/17/2013US8610266 Semiconductor device for radio frequency applications and method for making the same
12/17/2013US8610264 Compliant interconnects in wafers
12/17/2013US8610250 Packaging substrate having embedded capacitors and fabrication method thereof
12/17/2013US8610249 Non-planar capacitor and method of forming the non-planar capacitor
12/17/2013US8610241 Homo-junction diode structures using fin field effect transistor processing
12/17/2013US8610240 Integrated circuit with multi recessed shallow trench isolation
12/17/2013US8610239 Semiconductor device and method of manufacturing the same
12/17/2013US8610238 Crack stop trenches
12/17/2013US8610237 Semiconductor apparatus
12/17/2013US8610223 Embedded microelectromechanical systems sensor and related devices and methods
12/17/2013US8610219 Semiconductor device having a memory cell section, an adjacent circuit section, and silicide formed on an impurity diffused region
12/17/2013US8610207 Semiconductor architecture having field-effect transistors especially suitable for analog applications
12/17/2013US8610204 Semiconductor device
12/17/2013US8610200 Nitride read only memory device with buried diffusion spacers and method for making the same
12/17/2013US8610193 Semiconductor constructions, NAND unit cells, methods of forming semiconductor constructions, and methods of forming NAND unit cells
12/17/2013US8610182 Semiconductor device and method for manufacturing the same
12/17/2013US8610179 Amorphous-silicon thin film transistor and shift register having the same
12/17/2013US8610178 Semiconductor device having a fuse element
12/17/2013US8610176 Standard cell architecture using double poly patterning for multi VT devices
12/17/2013US8610160 Cooling unit using ionic wind and LED lighting unit including the cooling unit
12/17/2013US8610146 Light emitting diode package and method of manufacturing the same
12/17/2013US8610133 Photodetection device
12/17/2013US8610128 Thin film transistor method of fabricating the same
12/17/2013US8610121 Methods for discretized processing and process sequence integration of regions of a substrate
12/17/2013US8610120 Liquid crystal display device and manufacturing method thereof
12/17/2013US8610119 Stability enhancements in metal oxide semiconductor thin film transistors
12/17/2013US8610118 Flexible display panel having curvature that matches curved surface of vehicle part
12/17/2013US8610102 Nonvolatile memory device and manufacturing method thereof
12/17/2013US8610099 Planar resistive memory integration
12/17/2013US8610034 Heater, manufacturing apparatus for semiconductor device, and manufacturing method for semiconductor device
12/17/2013US8610033 Rapid thermal process reactor utilizing a low profile dome
12/17/2013US8609999 Circuit board, electronic device and method for manufacturing the same
12/17/2013US8609556 Thin film deposition apparatus with an expanding thermal plasma source and method for depositing a thin film using the same
12/17/2013US8609555 Increased stability of a complex material stack in a semiconductor device by providing fluorine enriched interfaces
12/17/2013US8609554 Semiconductor structure and method for manufacturing the same
12/17/2013US8609553 Methods of forming rutile titanium dioxide and associated methods of forming semiconductor structures
12/17/2013US8609552 Method for controlling dangling bonds in fluorocarbon films
12/17/2013US8609551 Method for manufacturing semiconductor device and substrate processing apparatus
12/17/2013US8609550 Methods for manufacturing integrated circuit devices having features with reduced edge curvature
12/17/2013US8609549 Plasma etching method, plasma etching apparatus, and computer-readable storage medium
12/17/2013US8609548 Method for providing high etch rate
12/17/2013US8609547 Plasma etching method and computer-readable storage medium
12/17/2013US8609546 Pulsed bias plasma process to control microloading
12/17/2013US8609545 Method to improve mask critical dimension uniformity (CDU)
12/17/2013US8609544 Method for fabricating semiconductor device
12/17/2013US8609543 Method for manufacturing semiconductor device having multi-layered hard mask layer
12/17/2013US8609542 Profiling solid state samples
12/17/2013US8609541 Polishing slurry for metal films and polishing method
12/17/2013US8609540 Reliable packaging and interconnect structures
12/17/2013US8609539 Embedded semiconductor device substrate and production method thereof
12/17/2013US8609538 Methods relating to the fabrication of devices having conductive substrate vias with catch-pad etch-stops
12/17/2013US8609536 Stair step formation using at least two masks
12/17/2013US8609535 Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same
12/17/2013US8609534 Electrical fuse structure and method of fabricating same
12/17/2013US8609533 Methods for fabricating integrated circuits having substrate contacts and integrated circuits having substrate contacts
12/17/2013US8609532 Magnetically sintered conductive via
12/17/2013US8609531 Methods of selectively forming ruthenium liner layer
12/17/2013US8609530 Method for forming a three-dimensional structure of metal-insulator-metal type
12/17/2013US8609529 Fabrication method and structure of through silicon via
12/17/2013US8609528 High-density patterning
12/17/2013US8609527 Method of manufacturing semiconductor device
12/17/2013US8609526 Preventing UBM oxidation in bump formation processes
12/17/2013US8609525 Integrated circuit packaging system with interconnects and method of manufacture thereof
12/17/2013US8609524 Method for making semiconductor device comprising replacement gate electrode structures with an enhanced diffusion barrier
12/17/2013US8609523 Method of making a memory array with surrounding gate access transistors and capacitors with global staggered local bit lines
12/17/2013US8609522 Process for producing a conducting electrode
12/17/2013US8609521 Method of manufacturing semiconductor device
12/17/2013US8609520 Carbon tape intended to receive a layer of a semiconductor material
12/17/2013US8609519 Combinatorial approach for screening of ALD film stacks