Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2004
12/09/2004WO2004042816A3 Monolithic bridge capacitor
12/09/2004WO2004041712A3 Method of making a nanoscale electronic device
12/09/2004WO2004036311A3 Anti-reflective compositions comprising triazine compounds
12/09/2004WO2004033752A3 Two-layer film for next generation damascene barrier application with good oxidation resistance
12/09/2004WO2004027851A3 Method of forming and/or modifying a dielectric film on a semiconductor surface
12/09/2004WO2004027816A3 A method and apparatus for the compensation of edge ring wear in a plasma processing chamber
12/09/2004WO2004027518A3 A method for the removal of an imaging layer from a semiconductor substrate stack
12/09/2004WO2004006324A3 Method for making an anisotropic conductive film with pointed conductive inserts
12/09/2004WO2003102993A3 Beam stop for use in an ion implantation system
12/09/2004WO2003098663A3 Trench mosfet with field relief feature
12/09/2004WO2003082522A8 Apparatus and methods for detecting transitions of wafer surface properties in chemical mechanical polishing for process status and control
12/09/2004WO2002095819A8 Structure and method to preserve sti during etching
12/09/2004US20040250221 Method for determining cell body and biasing plate contact locations for embedded dram in soi
12/09/2004US20040250186 Scan-path circuit, logic circuit including the same, and method for testing integrated circuit
12/09/2004US20040250185 Semiconductor integrated circuit
12/09/2004US20040250180 Input/output circuit and semiconductor integrated circuit
12/09/2004US20040250152 Clock delay adjusting method of semiconductor integrated circuit device and semiconductor integrated circuit device formed by the method
12/09/2004US20040249609 In-situ monitoring method and system for mold deformation in nanoimprint
12/09/2004US20040249604 Methods of and apparatus for controlling process profiles
12/09/2004US20040249598 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer
12/09/2004US20040249588 Operation analyzing method for semiconductor integrated circuit device, analyzing system used in the same, and optimization design method using the same
12/09/2004US20040249507 Mapping device
12/09/2004US20040249494 Substrate transfer controlling apparatus and substrate transferring method
12/09/2004US20040248752 Cleaning solution used in process of fabricating semiconductor device
12/09/2004US20040248501 Polishing pad for chemical mechanical polishing apparatus
12/09/2004US20040248430 Wafer cooling chuck with direct coupled peltier unit
12/09/2004US20040248429 Transistor manufacturing method, electrooptical apparatus and electronic apparatus
12/09/2004US20040248427 Article comprising an oxide layer on a GaAs-based semiconductor structure and method of forming same
12/09/2004US20040248426 Edge peeling improvement of low-k dielectric materials stack by adjusting EBR resistance
12/09/2004US20040248425 Methods and apparatus for dispensing semiconductor processing solutions with multi-syringe fluid delivery systems
12/09/2004US20040248424 Compositions for dissolution of low-k dielectric film, and methods of use
12/09/2004US20040248422 Fabrication method of polycrystalline silicon TFT
12/09/2004US20040248421 Method for manufacturing metal microstructure
12/09/2004US20040248420 Substrate with microstructure formed thereon and manufacturing method thereof
12/09/2004US20040248419 Method of manufacturing semiconductor device
12/09/2004US20040248418 Fabrication method of semiconductor integrated circuit device
12/09/2004US20040248417 Method for stripping sacrificial layer in MEMS assembly
12/09/2004US20040248415 Polishing method and polishing liquid
12/09/2004US20040248414 Bi-level resist structure and fabrication method for contact holes on semiconductor substrates
12/09/2004US20040248413 Etchant and method of use
12/09/2004US20040248412 Method and composition for fine copper slurry for low dishing in ECMP
12/09/2004US20040248411 Method and device for simulation, method and device for polishing, method and device for preparing control parameters or control program, polishing system, recording medium, and method of manufacturing semiconductor device
12/09/2004US20040248409 Selective metal encapsulation schemes
12/09/2004US20040248408 System, method and apparatus for improved global dual-damascene planarization
12/09/2004US20040248407 Displacement method to grow cu overburden
12/09/2004US20040248406 Local interconnection method and structure for use in semiconductor device
12/09/2004US20040248405 Method of and apparatus for manufacturing semiconductor device
12/09/2004US20040248404 Reactive preclean prior to metallization for sub-quarter micron application
12/09/2004US20040248403 Method for forming electroless metal low resistivity interconnects
12/09/2004US20040248402 Methods of forming openings extending through electrically insulative material to electrically conductive material
12/09/2004US20040248401 Method for forming buried wiring and semiconductor device
12/09/2004US20040248400 Composite low-k dielectric structure
12/09/2004US20040248399 Integration scheme for metal gap fill, with fixed abrasive CMP
12/09/2004US20040248398 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow
12/09/2004US20040248397 Methods of forming a conductive structure in an integrated circuit device
12/09/2004US20040248396 Method for forming multi-layer wiring structure
12/09/2004US20040248395 Method for manufacturing semiconductor device
12/09/2004US20040248393 Method of manufacturing semiconductor device and the semiconductor device
12/09/2004US20040248392 Tailoring nitrogen profile in silicon oxynitride using rapid thermal annealing with ammonia under ultra-low pressure
12/09/2004US20040248391 Lifting and supporting device
12/09/2004US20040248390 Method for forming a layered semiconductor technology structure and corresponding layered semiconductor technology structure
12/09/2004US20040248389 Method of making semiconductor device
12/09/2004US20040248388 Laser irradiation apparatus, method of irradiating laser light, and method of manufacturing a semiconductor device
12/09/2004US20040248387 Semiconductor device and a method of manufacturing the same
12/09/2004US20040248386 Semiconductor device, liquid crystal display device, semicondutor film producing method, and semiconductor device producing method
12/09/2004US20040248385 Indium-containing wafer and method for production thereof
12/09/2004US20040248384 Image sensor fabrication method and structure
12/09/2004US20040248383 Method to reduce excess color filter signal deviation
12/09/2004US20040248382 Pressure sensitive adhesive double coated tape and method for producing ic chip using it
12/09/2004US20040248381 Nanoelectronic interconnection and addressing
12/09/2004US20040248380 Method of producing a semiconductor structure having at least one support substrate and an ultrathin layer
12/09/2004US20040248379 Method for bonding semiconductor structures together
12/09/2004US20040248378 Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate
12/09/2004US20040248376 Method for forming a cavity structure on soi substrate and cavity structure formed on soi substrate
12/09/2004US20040248375 Trench filling methods
12/09/2004US20040248374 Filling high aspect ratio isolation structures with polysilazane based material
12/09/2004US20040248373 Semiconductor devices and methods to form trenches in semiconductor devices
12/09/2004US20040248372 High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process
12/09/2004US20040248371 Floating-gate memory cell having trench structure with ballastic-charge injector and array of memory cells
12/09/2004US20040248370 Double diffused MOS transistor and method for manufacturing same
12/09/2004US20040248369 Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region
12/09/2004US20040248368 Mosfet device with in-situ doped, raised source and drain structures
12/09/2004US20040248367 Method of forming an embedded flash memory device
12/09/2004US20040248366 Method of manufacturing flash memory device
12/09/2004US20040248365 Area-efficient stack capacitor
12/09/2004US20040248364 Method of forming a memory cell with a single sided buried strap
12/09/2004US20040248363 Soi trench capacitor cell incorporating a low-leakage floating body array transistor
12/09/2004US20040248362 Semiconductor device and fabrication method therefor
12/09/2004US20040248361 Methods of forming MIM type capacitor structures using low temperature plasma processing
12/09/2004US20040248360 Ferroelectric film, method of manufacturing ferroelectric film, ferroelectric capacitor, method of manufacturing ferroelectric capacitor, and ferroelectric memory
12/09/2004US20040248359 Semiconductor device and method of manufacturing the same
12/09/2004US20040248358 Manufacturing method of a semiconductor device capable of accurately setting a resistance value of a resistance element
12/09/2004US20040248357 Quasi self-aligned single polysilicon bipolar active device with intentional emitter window undercut
12/09/2004US20040248356 Low-GIDL MOSFET structure and method for fabrication
12/09/2004US20040248355 Modified facet etch to prevent blown gate oxide and increase etch chamber life
12/09/2004US20040248354 System and method for depositing a graded carbon layer to enhance critical layer stability
12/09/2004US20040248353 Processor and semiconductor integrated circuit
12/09/2004US20040248352 High performance vertical PNP transistor method
12/09/2004US20040248351 Semiconductor manufacturing method using two-stage annealing
12/09/2004US20040248350 Method for manufacturing semiconductor device