H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2004
12/07/2004	US6828592 Optoelectronic device and method of manufacture thereof
12/07/2004	US6828591 Semiconductor light emitting device and fabrication method thereof
12/07/2004	US6828589 Optical semiconductor device and method for manufacturing the same
12/07/2004	US6828587 Semiconductor device
12/07/2004	US6828586 Semiconductor device and method of manufacturing the same
12/07/2004	US6828585 Thin-film transistor, method for fabricating the same, and liquid crystal display device
12/07/2004	US6828584 Semiconductor device and method for manufacturing the same
12/07/2004	US6828582 Thin film transistor, display device and their production
12/07/2004	US6828581 Selective electroless attachment of contacts to electrochemically-active molecules
12/07/2004	US6828580 Vertical field effect transistors including conformal monocrystalline silicon layer on trench sidewall
12/07/2004	US6828574 Modulator driven photocathode electron beam generator
12/07/2004	US6828573 Electron beam lithography system
12/07/2004	US6828572 Ion beam incident angle detector for ion implant systems
12/07/2004	US6828570 Technique for writing with a raster scanned beam
12/07/2004	US6828569 Lithographic projection apparatus, device manufacturing method and device manufactured thereby
12/07/2004	US6828565 Electron beam source, electron optical apparatus using such beam source and method of operating and electron beam source
12/07/2004	US6828554 Electron beam inspection method and apparatus and semiconductor manufacturing method and its manufacturing line utilizing the same
12/07/2004	US6828542 System and method for lithography process monitoring and control
12/07/2004	US6828511 Prefabricated semiconductor chip carrier
12/07/2004	US6828510 Multilayer printed wiring board and method of manufacturing multilayer printed wiring board
12/07/2004	US6828289 Low surface tension, low viscosity, aqueous, acidic compositions containing fluoride and organic, polar solvents for removal of photoresist and organic and inorganic etch residues at room temperature
12/07/2004	US6828260 Ultra-violet treatment of a tunnel barrier layer through an overlayer a tunnel junction device
12/07/2004	US6828259 Enhanced transistor gate using E-beam radiation
12/07/2004	US6828258 Method of forming an insulating film having SI-C, SI-O and SI-H bonds to cover wiringlines of a semiconductor device
12/07/2004	US6828257 Method for forming interlayer dielectric film
12/07/2004	US6828256 Methods for forming metal-containing films using metal complexes with chelating O- and/or N-donor ligands
12/07/2004	US6828255 Crack inhibited composite dielectric layer
12/07/2004	US6828254 Plasma enhanced chemical vapor deposition apparatus and method for forming nitride layer using the same
12/07/2004	US6828253 A post-etch treatment for enhancing and stabilizing the photoluminescence (PL) from a porous silicon (PS) substrate is outlined. The method includes treating the PS substrate with an aqueous hydrochloric acid solution and then treating the PS
12/07/2004	US6828252 Method of etching a contact opening
12/07/2004	US6828251 Method for improved plasma etching control
12/07/2004	US6828250 Process for etching vias in organosilicate glass materials without causing RIE lag
12/07/2004	US6828249 System and method for enhanced monitoring of an etch process
12/07/2004	US6828248 Method of pull back for forming shallow trench isolation
12/07/2004	US6828247 Method for etching organic film, method for fabricating semiconductor device and pattern formation method
12/07/2004	US6828245 Method of improving an etching profile in dual damascene etching
12/07/2004	US6828243 Apparatus and method for plasma treatment
12/07/2004	US6828242 Method for manufacturing semiconductor integrated circuit device
12/07/2004	US6828240 Method of manufacturing multi-level contacts by sizing of contact sizes in integrated circuits
12/07/2004	US6828239 Method of forming a high aspect ratio shallow trench isolation
12/07/2004	US6828238 Methods of forming openings extending through electrically insulative material to electrically conductive material
12/07/2004	US6828237 Sidewall polymer deposition method for forming a patterned microelectronic layer
12/07/2004	US6828236 Method for forming silicide wires in a semiconductor device
12/07/2004	US6828235 Semiconductor manufacturing method, substrate processing method, and semiconductor manufacturing apparatus
12/07/2004	US6828234 RTP process chamber pressure control
12/07/2004	US6828233 Forming reliable, defect free material with substantial void elimination; covering exposed surface and interior sidewalls of hole with titanium aluminide and titanium nitride layers then depositing conductive plug
12/07/2004	US6828232 Semiconductor structure having in-situ formed unit resistors and method for fabrication
12/07/2004	US6828230 Integrated circuit having conductive paths of different heights formed from the same layer structure and method for forming the same
12/07/2004	US6828229 Method of manufacturing interconnection line in semiconductor device
12/07/2004	US6828228 Methods for fabricating residue-free contact openings
12/07/2004	US6828227 Method for applying uniform pressurized film across wafer
12/07/2004	US6828226 Removal of SiON residue after CMP
12/07/2004	US6828225 Substrate processing method
12/07/2004	US6828224 Method of fabricating substrate utilizing an electrophoretic deposition process
12/07/2004	US6828223 Localized slots for stress relieve in copper
12/07/2004	US6828222 Method for manufacturing multilayer wiring structure semiconductor device
12/07/2004	US6828220 Flip chip-in-leadframe package and process
12/07/2004	US6828219 Stacked spacer structure and process
12/07/2004	US6828218 Method of forming a thin film using atomic layer deposition
12/07/2004	US6828217 Dicing process for GAAS/INP and other semiconductor materials
12/07/2004	US6828216 Process for detaching layers of material
12/07/2004	US6828215 Device and method for core buildup using a separator
12/07/2004	US6828214 Semiconductor member manufacturing method and semiconductor device manufacturing method
12/07/2004	US6828213 Method to improve STI nano gap fill and moat nitride pull back
12/07/2004	US6828212 Method of forming shallow trench isolation structure in a semiconductor device
12/07/2004	US6828211 Shallow trench filled with two or more dielectrics for isolation and coupling or for stress control
12/07/2004	US6828210 Method of forming a device isolation trench in an integrated circuit device
12/07/2004	US6828209 Methods for manufacturing a semiconductor device including a trench isolation region
12/07/2004	US6828208 Method of fabricating shallow trench isolation structure
12/07/2004	US6828207 Method of Fabricating a capacitor structure having hemispherical grains
12/07/2004	US6828206 Semiconductor device and method for fabricating the same
12/07/2004	US6828205 Method using wet etching to trim a critical dimension
12/07/2004	US6828204 Method and system for compensating for anneal non-uniformities
12/07/2004	US6828203 Semiconductor device and method of manufacturing the same
12/07/2004	US6828202 Semiconductor region self-aligned with ion implant shadowing
12/07/2004	US6828201 Method of manufacturing a top insulating layer for a sonos-type device
12/07/2004	US6828200 Multistage deposition that incorporates nitrogen via an intermediate step
12/07/2004	US6828199 Monos device having buried metal silicide bit line
12/07/2004	US6828198 System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process
12/07/2004	US6828197 Method for fabricating nitride read only memory
12/07/2004	US6828196 Trench filling process for preventing formation of voids in trench
12/07/2004	US6828195 Method of manufacturing a trench transistor having a heavy body region
12/07/2004	US6828194 Low voltage programmable and erasable flash EEPROM
12/07/2004	US6828193 Methods of forming hemispherical grained silicon on a template on a semiconductor work object
12/07/2004	US6828192 Semiconductor memory cell and method for fabricating the memory cell
12/07/2004	US6828191 Trench capacitor with an insulation collar and method for producing a trench capacitor
12/07/2004	US6828190 Method for manufacturing capacitor of semiconductor device having dielectric layer of high dielectric constant
12/07/2004	US6828189 Semiconductor device and method of fabricating the same
12/07/2004	US6828188 Semiconductor device with high- and low-density regions of transistor elements on single semiconductor substrate, and method of manufacturing such semiconductor device
12/07/2004	US6828187 Method for uniform reactive ion etching of dual pre-doped polysilicon regions
12/07/2004	US6828186 Vertical sidewall profile spacer layer and method for fabrication thereof
12/07/2004	US6828185 CMOS of semiconductor device and method for manufacturing the same
12/07/2004	US6828184 Method of manufacturing semiconductor devices
12/07/2004	US6828183 Process for high voltage oxide and select gate poly for split-gate flash memory
12/07/2004	US6828182 Epitaxial thin film forming method
12/07/2004	US6828181 Dual gate material process for CMOS technologies
12/07/2004	US6828180 Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction
12/07/2004	US6828179 Semiconductor device and method for manufacturing same
12/07/2004	US6828178 Thin film semiconductor device having arrayed configuration of semiconductor crystals and a method for producing it
12/07/2004	US6828174 Semiconductor device and a method of manufacturing the same

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