Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2004
12/21/2004US6834007 Semiconductor memory device
12/21/2004US6834004 Semiconductor integrated circuit having logic circuit comprising transistors with lower threshold voltage values and improved pattern layout
12/21/2004US6833907 Illuminator for a lithography apparatus, a lithography apparatus comprising such an illuminator, and a manufacturing method employing such a lithography apparatus
12/21/2004US6833906 Projection exposure apparatus, and device manufacturing method using the same
12/21/2004US6833905 Illumination apparatus, projection exposure apparatus, and device fabricating method
12/21/2004US6833903 Inert gas purge method and apparatus, exposure apparatus, reticle stocker, reticle inspection apparatus, reticle transfer box, and device manufacturing method
12/21/2004US6833870 Charge transfer device and solid-state image pickup device
12/21/2004US6833750 Semiconductor integrated circuit device
12/21/2004US6833748 Voltage supply circuit for active and standby mode voltages
12/21/2004US6833727 Method and apparatus for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability
12/21/2004US6833725 Semiconductor characteristic evaluation apparatus
12/21/2004US6833719 Apparatus for evaluating electrical characteristics
12/21/2004US6833717 Electron beam test system with integrated substrate transfer module
12/21/2004US6833666 Flat panel display with high capacitance and method of manufacturing the same
12/21/2004US6833629 Dual cure B-stageable underfill for wafer level
12/21/2004US6833628 Mutli-chip module
12/21/2004US6833627 To form, in situ, at least semisolid dam structures of photopolymeric material about the devices to entrap liquid, unpolymerized resin between the devices and the substrate
12/21/2004US6833625 Alloy with at least two dopant elements for an interconnect structure for forming the self- aligned diffusion barrier material
12/21/2004US6833623 Enhanced barrier liner formation for via
12/21/2004US6833622 Semiconductor topography having an inactive region formed from a dummy structure pattern
12/21/2004US6833621 Diffusion barrier layer and the anti-corrosive coating layer are sequentially formed on base plate to prevent elements of base plate from being diffused to anti-corrosive coating layer
12/21/2004US6833619 Thin profile semiconductor package which reduces warpage and damage during laser markings
12/21/2004US6833613 Stacked semiconductor package having laser machined contacts
12/21/2004US6833612 Flip-chip image sensor packages
12/21/2004US6833611 Semiconductor device
12/21/2004US6833610 Bridge connection type of chip package and fabricating method thereof
12/21/2004US6833608 Semiconductor device and packaging system therefore
12/21/2004US6833606 Fabrication of a heterojunction bipolar transistor with integrated MIM capacitor
12/21/2004US6833605 Method of making a memory cell capacitor with Ta2O5 dielectric
12/21/2004US6833602 Device having electrically isolated low voltage and high voltage regions and process for fabricating the device
12/21/2004US6833601 Semiconductor imaging device having a refractive index matching layer
12/21/2004US6833600 Multilayer light reflection preventing film or the like having high adhesion force
12/21/2004US6833596 Semiconductor device and method of manufacturing the same
12/21/2004US6833595 Semiconductor device having an improved layout pattern of pair transistors
12/21/2004US6833594 Semiconductor integrated circuit device and manufacture method therefore
12/21/2004US6833593 Electrode means, a method for its manufacture, an apparatus comprising the electrode means as well as use of the latter
12/21/2004US6833591 Semiconductor device and method for fabricating the same
12/21/2004US6833589 Method for manufacturing field effect transistor
12/21/2004US6833588 Semiconductor device having a U-shaped gate structure
12/21/2004US6833587 Heat removal in SOI devices using a buried oxide layer/conductive layer combination
12/21/2004US6833586 LDMOS transistor with high voltage source and drain terminals
12/21/2004US6833583 Edge termination in a trench-gate MOSFET
12/21/2004US6833582 Nonvolatile semiconductor memory device
12/21/2004US6833581 Structure and method for preventing process-induced UV radiation damage in a memory cell
12/21/2004US6833580 Self-aligned dual-bit NVM cell and method for forming the same
12/21/2004US6833579 Conductive container structures having a dielectric cap
12/21/2004US6833578 Method and structure improving isolation between memory cell passing gate and capacitor
12/21/2004US6833577 Semiconductor device
12/21/2004US6833576 Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
12/21/2004US6833575 Dopant barrier for doped glass in memory devices
12/21/2004US6833574 Semiconductor device having ferroelectric substance capacitor
12/21/2004US6833572 Electrode materials with improved hydrogen degradation resistance
12/21/2004US6833569 Self-aligned planar double-gate process by amorphization
12/21/2004US6833567 Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof
12/21/2004US6833562 Silicon carbide semiconductor device and its manufacturing method
12/21/2004US6833561 Storage capacitor structure for LCD and OELD panels
12/21/2004US6833557 Integrated circuit and a method of manufacturing an integrated circuit
12/21/2004US6833556 Insulated gate field effect transistor having passivated schottky barriers to the channel
12/21/2004US6833552 System and method for implanting a wafer with an ion beam
12/21/2004US6833510 Semiconductor packages and methods for making the same
12/21/2004US6833332 Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same
12/21/2004US6833331 Method of manufacturing semiconductor integrated circuit device having insulating film formed from liquid substance containing polymer of silicon, oxygen, and hydrogen
12/21/2004US6833330 Method to eliminate inverse narrow width effect in small geometry MOS transistors
12/21/2004US6833329 Methods of forming oxide regions over semiconductor substrates
12/21/2004US6833327 Method of fabraicating semiconductor device
12/21/2004US6833326 Method for forming fine patterns in semiconductor device
12/21/2004US6833325 Method for plasma etching performance enhancement
12/21/2004US6833324 Process and device for cleaning a semiconductor wafer
12/21/2004US6833323 Method for forming patterned features at a semiconductor wafer periphery to prevent metal peeling
12/21/2004US6833322 Apparatuses and methods for depositing an oxide film
12/21/2004US6833321 Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability
12/21/2004US6833320 Removing sacrificial material by thermal decomposition
12/21/2004US6833319 Method for fabricating semiconductor device
12/21/2004US6833318 Gap-filling process
12/21/2004US6833316 Semiconductor device including a pad and a method of manufacturing the same
12/21/2004US6833315 Removing silicon oxynitride of polysilicon gates in fabricating integrated circuits
12/21/2004US6833314 Method of characterizing implantation of a species in a substrate by surface imaging
12/21/2004US6833313 Method of manufacturing semiconductor device by implanting rare gas ions
12/21/2004US6833312 Plate member separating apparatus and method
12/21/2004US6833311 Manufacturing method for a shallow trench isolation region with high aspect ratio
12/21/2004US6833310 Semiconductor device having thin film formed by atomic layer deposition and method for fabricating the same
12/21/2004US6833309 Method of manufacturing a semiconductor device
12/21/2004US6833308 Structure and method for dual gate oxide thicknesses
12/21/2004US6833307 Method for manufacturing a semiconductor component having an early halo implant
12/21/2004US6833306 Deuterium treatment of semiconductor device
12/21/2004US6833305 Vertical DRAM punchthrough stop self-aligned to storage trench
12/21/2004US6833304 Semiconductor device and manufacturing method thereof
12/21/2004US6833303 Method for forming semiconductor device
12/21/2004US6833302 Method for fabricating a memory cell
12/21/2004US6833301 Semiconductor device with an improved gate electrode pattern and a method of manufacturing the same
12/21/2004US6833300 Method of forming integrated circuit contacts
12/21/2004US6833299 Method of fabricating a stacked poly-poly and MOS capacitor using a sige integration scheme
12/21/2004US6833298 Method for fabricating a semiconductor component having at least one transistor cell and an edge cell
12/21/2004US6833297 Method for reducing drain induced barrier lowering in a memory device
12/21/2004US6833296 Method of making a MISFET semiconductor device having a high dielectric constant insulating film with tapered end portions
12/21/2004US6833295 Method of manufacturing a semiconductor device
12/21/2004US6833294 Method for making semiconductor device including band-engineered superlattice
12/21/2004US6833293 Semiconductor device and method for manufacturing the same
12/21/2004US6833292 Reducing dopant losses during annealing processes
12/21/2004US6833291 Semiconductor processing methods