Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2004
12/07/2004US6829750 Pass-transistor very large scale integration
12/07/2004US6829740 Method and apparatus for selectively compacting test responses
12/07/2004US6829559 Methods and systems for determining a presence of macro and micro defects on a specimen
12/07/2004US6829381 Method for detecting defects
12/07/2004US6829270 Nitride III-V compound semiconductor substrate, its manufacturing method, manufacturing method of a semiconductor light emitting device, and manufacturing method of a semiconductor device
12/07/2004US6829261 Method for the stabilization of the radiation output of a gas discharge-coupled radiation source in pulsed operation
12/07/2004US6829186 Semiconductor integrated circuit
12/07/2004US6829173 Semiconductor memory device capable of accurately writing data
12/07/2004US6829172 Programming of nonvolatile memory cells
12/07/2004US6829171 Memory device trapping charges in insulating film to store information in non-volatile manner
12/07/2004US6829165 Non-volatile semiconductor memory device and method of actuating the same
12/07/2004US6829162 Magnetic memory device and manufacturing method thereof
12/07/2004US6829159 Magnetic device
12/07/2004US6829158 Magnetoresistive level generator and method
12/07/2004US6829157 Method of controlling magnetization easy axis in ferromagnetic films using voltage, ultrahigh-density, low power, nonvolatile magnetic memory using the control method, and method of writing information on the magnetic memory
12/07/2004US6829130 Power supply apparatus for supplying electric power to substrate carrier container
12/07/2004US6829127 High performance capacitor structure
12/07/2004US6829126 Electrostatic discharge protection circuit
12/07/2004US6829099 Projection optical system and projection exposure apparatus
12/07/2004US6829056 Monitoring dimensions of features at different locations in the processing of substrates
12/07/2004US6829054 Integrated surface metrology
12/07/2004US6829047 Defect detection system
12/07/2004US6829038 Exposure apparatus and exposure method
12/07/2004US6829035 Advanced mask cleaning and handling
12/07/2004US6829034 Exposure apparatus and device manufacturing method
12/07/2004US6829021 Thin film transistor crystal liquid display device including plural conductive beads and manufacturing method thereof
12/07/2004US6828951 Semiconductor display device
12/07/2004US6828950 Display device and method of driving the same
12/07/2004US6828842 Semiconductor integrated circuit device
12/07/2004US6828824 Heterogeneous interconnection architecture for programmable logic devices
12/07/2004US6828821 Input buffer circuit
12/07/2004US6828817 Testing device included in the electrooptic device
12/07/2004US6828812 Test apparatus for testing semiconductor dice including substrate with penetration limiting contacts for making electrical connections
12/07/2004US6828793 Battery voltage detecting circuit
12/07/2004US6828785 Magneto-resistive effect element, magnetic sensor using magneto-resistive effect, magnetic head using magneto-resistive effect and magnetic memory
12/07/2004US6828772 Rotating gripper wafer flipper
12/07/2004US6828725 Light emitting device
12/07/2004US6828690 Non-uniform minority carrier lifetime distributions in high performance silicon power devices
12/07/2004US6828689 Semiconductor latches and SRAM devices
12/07/2004US6828686 Chip size stack package and method of fabricating the same
12/07/2004US6828684 Semiconductor device and method of manufacturing the same
12/07/2004US6828683 Forming conductive copper-containing material over substrate and barrier layer comprising methylated silicon nitride
12/07/2004US6828681 Semiconductor devices having contact pads and methods of manufacturing the same
12/07/2004US6828680 Integrated circuit configuration using spacers as a diffusion barrier and method of producing such an integrated circuit configuration
12/07/2004US6828678 Semiconductor topography with a fill material arranged within a plurality of valleys associated with the surface roughness of the metal layer
12/07/2004US6828677 Precision electroplated solder bumps and method for manufacturing thereof
12/07/2004US6828676 Semiconductor device manufacturing method, semiconductor device, and semiconductor device unit
12/07/2004US6828670 Module component
12/07/2004US6828669 Plurality of terminal pads located at positions corresponding to plurality of solder bumps or flip chips; semiconductors
12/07/2004US6828665 Module device of stacked semiconductor packages and method for fabricating the same
12/07/2004US6828664 Packaging substrate with electrostatic discharge protection
12/07/2004US6828662 Semiconductor device
12/07/2004US6828661 Lead frame and a resin-sealed semiconductor device exhibiting improved resin balance, and a method for manufacturing the same
12/07/2004US6828657 Active matrix substrate and method of manufacturing the same
12/07/2004US6828656 High performance silicon contact for flip chip and a system using same
12/07/2004US6828655 Semiconductor film with low crystal defect and semiconductor device and display apparatus using the semiconductor film
12/07/2004US6828653 Method of forming metal fuses in CMOS processes with copper interconnect
12/07/2004US6828651 Integrated structure
12/07/2004US6828650 Bipolar junction transistor structure with improved current gain characteristics
12/07/2004US6828649 Semiconductor device having an interconnect that electrically connects a conductive material and a doped layer, and a method of manufacture therefor
12/07/2004US6828648 Semiconductor device and method of manufacturing the same
12/07/2004US6828646 Isolating trench and manufacturing process
12/07/2004US6828644 Semiconductor device with reduced parasitic capacitance between impurity diffusion regions
12/07/2004US6828643 Bonding pads over input circuits
12/07/2004US6828641 Semiconductor memory device using magneto resistive element and method of manufacturing the same
12/07/2004US6828638 Decoupling capacitors for thin gate oxides
12/07/2004US6828636 Semiconductor device isolated resistive zone
12/07/2004US6828635 Method for making high-gain vertical bipolar junction transistor structures compatible with CMOS process
12/07/2004US6828634 Semiconductor device with two types of FET's having different gate lengths and its manufacture method
12/07/2004US6828633 Semiconductor device formed on silicon-on-insulator substrate
12/07/2004US6828632 Stable PD-SOI devices and methods
12/07/2004US6828631 High-voltage transistor with multi-layer conduction region
12/07/2004US6828630 CMOS device on ultrathin SOI with a deposited raised source/drain, and a method of manufacture
12/07/2004US6828629 Semiconductor device and method of fabricating the same
12/07/2004US6828627 Semiconductor device
12/07/2004US6828626 Semiconductor device with vertical transistors
12/07/2004US6828625 Protective layer in memory device and method therefor
12/07/2004US6828624 Nonvolatile semiconductor memory device covered with insulating film which is hard for an oxidizing agent to pass therethrough
12/07/2004US6828623 Floating gate memory device with homogeneous oxynitride tunneling dielectric
12/07/2004US6828622 Nonvolatile semiconductor memory device and its manufacturing method
12/07/2004US6828621 Nonvolatile semiconductor memory device and method for fabricating the same
12/07/2004US6828619 Nonvolatile semiconductor storage device
12/07/2004US6828618 Split-gate thin-film storage NVM cell
12/07/2004US6828617 Method for fabricating a capacitor of a semiconductor device and a capacitor made thereby
12/07/2004US6828616 Integrated circuit devices that utilize doped Poly-Si1−xGex conductive plugs as interconnects
12/07/2004US6828615 Vertical internally-connected trench cell (V-ICTC) and formation method for semiconductor memory devices
12/07/2004US6828614 Semiconductor constructions, and methods of forming semiconductor constructions
12/07/2004US6828613 Dopant interface formation
12/07/2004US6828612 Semiconductor memory device
12/07/2004US6828611 Integrated circuit ferroelectric memory devices including plate lines directly on ferroelectric capacitors
12/07/2004US6828610 Method for modifying switching field characteristics of magnetic tunnel junctions
12/07/2004US6828608 Semiconductor integrated circuit device
12/07/2004US6828607 Discontinuous nitride structure for non-volatile transistors
12/07/2004US6828605 Field-effect-controlled semiconductor component and method of fabricating a doping layer in a vertically configured semiconductor component
12/07/2004US6828604 Semiconductor device with antenna pattern for reducing plasma damage
12/07/2004US6828603 Hetero-bipolar transistor with a sub-collector layer having a first portion and plural second portions
12/07/2004US6828602 Bipolar transistor and method manufacture thereof
12/07/2004US6828596 Contacting scheme for large and small area semiconductor light emitting flip chip devices
12/07/2004US6828594 Semiconductor light emission element, semiconductor composite element and process for producing semiconductor light emission element
12/07/2004US6828593 Semiconductor light emitting element and its manufacturing method