Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2013
12/19/2013US20130337652 Mask pattern for hole patterning and method for fabricating semiconductor device using the same
12/19/2013US20130337651 Double Patterning Strategy for Contact Hole and Trench in Photolithography
12/19/2013US20130337650 Method of manufacturing dual damascene structure
12/19/2013US20130337649 Compound for forming organic film, and organic film composition using the same, process for forming organic film, and patterning process
12/19/2013US20130337648 Method of making cavity substrate with built-in stiffener and cavity
12/19/2013US20130337647 Methods of forming a semiconductor device
12/19/2013US20130337646 Method for forming staircase word lines in a 3d non-volatile memory having vertical bit lines
12/19/2013US20130337645 Method of manufacturing semiconductor structure
12/19/2013US20130337642 Methods and devices for forming nanostructure monolayers and devices including such monolayers
12/19/2013US20130337641 Plasma doping method and apparatus
12/19/2013US20130337640 Method for fabricating a porous semiconductor body region
12/19/2013US20130337639 Method for Substrate Pretreatment To Achieve High-Quality III-Nitride Epitaxy
12/19/2013US20130337638 Method of manufacturing epitaxial silicon wafer and epitaxial silicon wafer manufactured by the method
12/19/2013US20130337637 Strained silicon and strained silicon germanium on insulator metal oxide semiconductor field effect transistors (mosfets)
12/19/2013US20130337636 Carbon doping of gallium arsenide via hydride vapor phase epitaxy
12/19/2013US20130337635 Film deposition apparatus, substrate processing apparatus and film deposition method
12/19/2013US20130337634 Fabrication method for producing semiconductor chips with enhanced die strength
12/19/2013US20130337633 Semiconductor die singulation method
12/19/2013US20130337632 Method for Producing Group III Nitride Crystal
12/19/2013US20130337631 Semiconductor Structure and Method
12/19/2013US20130337630 Methods of Forming a Span Comprising Silicon Dioxide
12/19/2013US20130337629 Method of fabricating semiconductor device
12/19/2013US20130337626 Monolithic Group III-V and Group IV Device
12/19/2013US20130337625 Method for manufacturing semiconductor device
12/19/2013US20130337621 Non-relaxed embedded stressors with solid source extension regions in cmos devices
12/19/2013US20130337620 Transport conduits for contacts to graphene
12/19/2013US20130337616 Methods of fabricating semiconductor devices and underfill equipment for the same
12/19/2013US20130337615 Polymer hot-wire chemical vapor deposition in chip scale packaging
12/19/2013US20130337614 Methods for manufacturing a chip package, a method for manufacturing a wafer level package, and a compression apparatus
12/19/2013US20130337613 Power module package and method for manufacturing the same
12/19/2013US20130337612 Heat dissipation methods and structures for semiconductor device
12/19/2013US20130337611 Thermally Enhanced Semiconductor Package with Conductive Clip
12/19/2013US20130337610 Method of fabricating electronic component
12/19/2013US20130337608 Semiconductor device, and process for manufacturing semiconductor device
12/19/2013US20130337587 Methods of adding pads and one or more interconnect layers to the passivated topside of a wafer including connections to at least a portion of the integrated circuit pads thereon
12/19/2013US20130337586 Polishing method
12/19/2013US20130337585 Multiple optical wavelength interferometric testing methods for the development and evaluation of subwavelength sized features within semiconductor devices and materials, wafers, and monitoring all phases of development and manufacture
12/19/2013US20130337584 Shape simulation apparatus, shape simulation program, semiconductor production apparatus, and semiconductor device production method
12/19/2013US20130337583 Method for repairing damage of dielectric film by cyclic processes
12/19/2013US20130337394 Heat treatment apparatus
12/19/2013US20130337202 Multilayer styrenic resin sheet
12/19/2013US20130337192 Bis-pyrroles-2-aldiminate manganese precursors for deposition of manganese containing films
12/19/2013US20130337179 Metal hardmask compositions
12/19/2013US20130336753 Wafer handling robot
12/19/2013US20130336749 Substrate loading and unloading station with buffer
12/19/2013US20130336613 Methods and apparatus providing thermal isolation of photonic devices
12/19/2013US20130335717 Immersion exposure apparatus and device manufacturing method with measuring device
12/19/2013US20130335676 Backlight module, manufacture method for such backlight module, and liquid crystal display device
12/19/2013US20130335288 Semiconductor package having a metal paint layer
12/19/2013US20130334832 Reconfigurable Guide Pin Design for Centering Wafers Having Different Sizes
12/19/2013US20130334714 Integrated circuit packaging system with warpage prevention mechanism and method of manufacture thereof
12/19/2013US20130334712 A method for manufacturing a chip package, a method for manufacturing a wafer level package, a chip package and a wafer level package
12/19/2013US20130334706 Integrated circuit package and method of making same
12/19/2013US20130334704 Deposition and Selective Removal of Conducting Helplayer for Nanostructure Processing
12/19/2013US20130334701 Through silicon via wafer and methods of manufacturing
12/19/2013US20130334700 Etch damage and esl free dual damascene metal interconnect
12/19/2013US20130334699 Semiconductor device and fabricating method thereof
12/19/2013US20130334698 Microelectronic assembly tolerant to misplacement of microelectronic elements therein
12/19/2013US20130334697 Integrated circuit packaging system with through silicon via and method of manufacture thereof
12/19/2013US20130334695 Electronic device and method of manufacturing such device
12/19/2013US20130334694 Packaging substrate, semiconductor package and fabrication method thereof
12/19/2013US20130334693 Raised silicide contact
12/19/2013US20130334691 Sidewalls of electroplated copper interconnects
12/19/2013US20130334690 Semiconductor structure and process thereof
12/19/2013US20130334689 Apparatus and method for low contact resistance carbon nanotube interconnect
12/19/2013US20130334688 Multi-elements-doped zinc oxide film, manufacturing method and application thereof
12/19/2013US20130334685 Embedded packages and methods of manufacturing the same
12/19/2013US20130334683 Electronic device packages having bumps and methods of manufacturing the same
12/19/2013US20130334682 Embedded packages including a multi-layered dielectric layer and methods of manufacturing the same
12/19/2013US20130334681 Semiconductor package structure and method for making the same
12/19/2013US20130334680 Wafer level packages of high voltage units for implantable medical devices and corresponding fabrication methods
12/19/2013US20130334679 Metal conservation with stripper solutions containing resorcinol
12/19/2013US20130334678 Device for supporting a substrate, as well as methods for manufacturing and using such a device
12/19/2013US20130334677 Semiconductor Modules and Methods of Formation Thereof
12/19/2013US20130334676 Semiconductor module and manufacturing method thereof
12/19/2013US20130334675 Package structure having lateral connections
12/19/2013US20130334674 Integrated circuit packaging system with tiebar-less design and method of manufacture thereof
12/19/2013US20130334672 Semiconductor device and manufacturing method thereof
12/19/2013US20130334670 Semiconductor device and fabrication method thereof
12/19/2013US20130334669 Semiconductor device
12/19/2013US20130334668 Integrated circuit packaging system with an encapsulation and method of manufacture thereof
12/19/2013US20130334667 Alkaline Etching Liquid for Texturing a Silicon Wafer Surface
12/19/2013US20130334666 Plasma-Assisted Atomic Layer Epitaxy of Cubic and Hexagonal InN and its alloys with AlN at Low Temperatures
12/19/2013US20130334659 Multiple Depth Vias In An Integrated Circuit
12/19/2013US20130334657 Planar interdigitated capacitor structures and methods of forming the same
12/19/2013US20130334655 Semiconductor device and method of manufacturing the same
12/19/2013US20130334654 Semiconductor device and method of manufacturing the same
12/19/2013US20130334651 Dual shallow trench isolation liner for preventing electrical shorts
12/19/2013US20130334650 Semiconductor structure and process thereof
12/19/2013US20130334649 Semiconductor device having variably laterally doped zone with decreasing concentration formed in the termination region
12/19/2013US20130334648 Methods and Apparatus for High Voltage Diodes
12/19/2013US20130334647 Semiconductor device
12/19/2013US20130334631 Memory cells, semiconductor device structures, memory systems, and methods of fabrication
12/19/2013US20130334630 Memory cells, semiconductor device structures, memory systems, and methods of fabrication
12/19/2013US20130334620 MEMS Devices and Fabrication Methods Thereof
12/19/2013US20130334618 Metal oxide semiconductor field effect transistor (mosfet) gate termination
12/19/2013US20130334614 Structure and method for finfet device
12/19/2013US20130334610 N-channel and p-channel end-to-end finfet cell architecture with relaxed gate pitch
12/19/2013US20130334607 Semiconductor structure and fabrication method
12/19/2013US20130334606 FinFET with High Mobility and Strain Channel
1 ... 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 ... 6590