Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2005
05/05/2005US20050095858 Method and apparatus for fabricating or altering microstructures using local chemical alterations
05/05/2005US20050095857 Methods of forming contact plugs including polysilicon doped with an impurity having a lesser diffusion coefficient than phosphorus and related structures
05/05/2005US20050095855 Compositions and methods for the electroless deposition of NiFe on a work piece
05/05/2005US20050095854 Methods for depositing high yield and low defect density conductive films in damascene structures
05/05/2005US20050095853 Semiconductor constructions
05/05/2005US20050095852 Field effect transistor with electroplated metal gate
05/05/2005US20050095851 Method of production of multilayer ceramic electronic device
05/05/2005US20050095850 Method of manufacturing amorphous metal oxide film and methods of manufacturing capacitance element having amorphous metal oxide film and semiconductor device
05/05/2005US20050095849 Integrated circuits with openings that allow electrical contact to conductive features having self-aligned edges
05/05/2005US20050095848 Method of fabricating a stacked local interconnect structure
05/05/2005US20050095847 Semiconductor device and manufacturing method thereof
05/05/2005US20050095846 System and method for defect free conductor deposition on substrates
05/05/2005US20050095845 Method of fabricating semiconductor device
05/05/2005US20050095844 Semiconductor integrated circuit device
05/05/2005US20050095843 Method for improving reliability of copper interconnects
05/05/2005US20050095842 Semiconductor device and manufacturing method thereof
05/05/2005US20050095841 Method for reducing amine based contaminants
05/05/2005US20050095840 Repairing damage to low-k dielectric materials using silylating agents
05/05/2005US20050095839 Method of patterning low-k film and method of fabricating dual-damascene structure
05/05/2005US20050095838 Method for manufacturing semiconductor device
05/05/2005US20050095837 Structure and method for forming a dielectric chamber and electronic device including the dielectric chamber
05/05/2005US20050095836 Bond pad scheme for Cu process
05/05/2005US20050095835 Structure and method of making capped chips having vertical interconnects
05/05/2005US20050095834 Method of manufacturing semiconductor device
05/05/2005US20050095833 Anti-stiction technique for thin film and wafer-bonded encapsulated microelectromechanical systems
05/05/2005US20050095832 Method for fabricating semiconductor integrated circuit device
05/05/2005US20050095831 Method for forming an electronic device
05/05/2005US20050095830 Selective self-initiating electroless capping of copper with cobalt-containing alloys
05/05/2005US20050095829 Housing unit and exposure method using the same
05/05/2005US20050095828 Process for sealing plasma-damaged, porous low-k materials
05/05/2005US20050095826 Heat-processing method and apparatus for semiconductor process
05/05/2005US20050095825 Method of manufacturing semiconductor devices
05/05/2005US20050095824 Method for manufacturing semiconductor device
05/05/2005US20050095823 Method of forming a polycrystalline silicon layer
05/05/2005US20050095822 Thin-film semiconductor device, manufacturing method of the same and image display apparatus
05/05/2005US20050095821 Method of forming a polycrystalline silicon layer
05/05/2005US20050095820 Technique for forming transistors having raised drain and source regions with different heights
05/05/2005US20050095819 Method and apparatus for cutting devices from substrates
05/05/2005US20050095818 Wiring technique
05/05/2005US20050095817 Silicon wafer dividing method and apparatus
05/05/2005US20050095816 Method for dicing and singulating substrates
05/05/2005US20050095815 Method of forming lattice-matched structure on silicon and structure formed thereby
05/05/2005US20050095814 Ultrathin form factor MEMS microphones and microspeakers
05/05/2005US20050095813 Ultrathin form factor MEMS microphones and microspeakers
05/05/2005US20050095812 Process for strengthening semiconductor substrates following thinning
05/05/2005US20050095811 Method for surface treatment
05/05/2005US20050095810 Manufacturing method of thin film device substrate
05/05/2005US20050095808 Thermal oxidation method for topographic feature corner rounding
05/05/2005US20050095807 Silicon buffered shallow trench isolation for strained silicon processes
05/05/2005US20050095806 Method for forming a filled trench in a semiconductor layer of a semiconductor substrate, and a semiconductor substrate with a semiconductor layer having a filled trench therein
05/05/2005US20050095805 System and method to reduce noise in a substrate
05/05/2005US20050095804 Method of fabricating semiconductor components through implantation and diffusion in a semiconductor substrate
05/05/2005US20050095803 Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
05/05/2005US20050095802 Alignment mark structure
05/05/2005US20050095801 Trench capacitor and method of manufacturing the same
05/05/2005US20050095799 Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region
05/05/2005US20050095798 Method of improving short channel effect and gate oxide reliability by nitrogen plasma treatment before spacer deposition
05/05/2005US20050095797 Method for fabricating semiconductor device with use of partial gate recessing process
05/05/2005US20050095796 Technique for forming a transistor having raised drain and source regions with a reduced number of process steps
05/05/2005US20050095795 MOS transistors having recesses with elevated source/drain regions and methods of fabricating such transistors
05/05/2005US20050095794 Method of fabricating recess channel array transistor
05/05/2005US20050095793 Transistor of semiconductor device and method for manufacturing the same
05/05/2005US20050095792 Depositing an oxide
05/05/2005US20050095790 Systems and methods for integration of heterogeneous circuit devices
05/05/2005US20050095789 Trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface
05/05/2005US20050095788 Method for fabricating a semiconductor structure with an encapsulation of a filling which is used for filling trenches
05/05/2005US20050095787 Structure and method for formation of a bipolar resistor
05/05/2005US20050095786 Non-volatile memory and method of manufacturing floating gate
05/05/2005US20050095785 Method of manufacturing split gate type nonvolatile memory device
05/05/2005US20050095784 Method for manufacturing flash memory device
05/05/2005US20050095783 Formation of a double gate structure
05/05/2005US20050095782 Lower electrode contact structure and method of forming the same
05/05/2005US20050095781 Capacitor integration at top-metal level with a protection layer for the copper surface
05/05/2005US20050095780 Method for fabricating memory cells and memory cell array
05/05/2005US20050095779 Methods for forming resistors for integrated circuit devices
05/05/2005US20050095778 Method for forming capacitor of semiconductor device
05/05/2005US20050095776 Semiconductor manufacturing apparatus, semiconductor manufacturing method and wafer stage
05/05/2005US20050095775 Memory device having a transistor and one resistant element as a storing means and method for driving the memory device
05/05/2005US20050095774 Semiconductor device manufacturing system and method for manufacturing semiconductor devices
05/05/2005US20050095773 Method to lower work function of gate electrode through Ge implantation
05/05/2005US20050095772 Method of fabricating semiconductor device
05/05/2005US20050095771 Optical recording medium and method for manufacturing the same
05/05/2005US20050095767 Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines
05/05/2005US20050095766 Method of forming a gate structure using a dual step polysilicon deposition procedure
05/05/2005US20050095765 Semiconductor device and method of fabricating the same
05/05/2005US20050095764 Triple-gate mosfet transistor and methods for fabricating the same
05/05/2005US20050095763 Method of forming an NMOS transistor and structure thereof
05/05/2005US20050095762 Mask for crystallizing and method of crystallizing amorphous silicon using the same
05/05/2005US20050095761 Method of manufacturing a semiconductor device
05/05/2005US20050095760 Method of manufacturing a semiconductor device
05/05/2005US20050095759 Method of manufacturing thin film transistor array substrate
05/05/2005US20050095758 CMOS thin film transistor
05/05/2005US20050095756 Method of forming a field effect transistor
05/05/2005US20050095755 Manufacturing method of thin film device substrate
05/05/2005US20050095754 Method for fabricating liquid crystal display device
05/05/2005US20050095753 Thin film transistor with multiple gates using metal induced lateral crystallization and method of fabricating the same
05/05/2005US20050095752 Method for manufacturing ball grid array package
05/05/2005US20050095751 Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability
05/05/2005US20050095750 Wafer level transparent packaging
05/05/2005US20050095748 Method for the selective surface treatment of planar workpieces
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