Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2005
05/10/2005US6891252 Electronic component with a semiconductor chip and method of producing an electronic component
05/10/2005US6891251 Varactors for CMOS and BiCMOS technologies
05/10/2005US6891249 Method and system for high density integrated bipolar power transistor using buried power buss
05/10/2005US6891246 Nonvolatile semiconductor memory and manufacturing method thereof
05/10/2005US6891245 Integrated circuit formed by removing undesirable second oxide while minimally affecting a desirable first oxide
05/10/2005US6891244 Plug structure having low contact resistance and method of manufacturing
05/10/2005US6891241 Single transistor type magnetic random access memory device and method of operating and manufacturing the same
05/10/2005US6891238 Semiconductor device and method of manufacturing the same
05/10/2005US6891237 Organic semiconductor device having an active dielectric layer comprising silsesquioxanes
05/10/2005US6891236 Semiconductor device and method of fabricating the same
05/10/2005US6891235 FET with T-shaped gate
05/10/2005US6891234 Transistor with workfunction-induced charge layer
05/10/2005US6891233 Methods to form dual metal gates by incorporating metals and their conductive oxides
05/10/2005US6891232 Semiconductor device having an injection substance to knock against oxygen and manufacturing method of the same
05/10/2005US6891231 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier
05/10/2005US6891230 Bipolar ESD protection structure
05/10/2005US6891229 Inverted isolation formed with spacers
05/10/2005US6891228 CMOS device on ultrathin SOI with a deposited raised source/drain, and a method of manufacture
05/10/2005US6891226 Dual gate logic device
05/10/2005US6891225 Dynamic semiconductor memory device
05/10/2005US6891224 Semiconductor device
05/10/2005US6891222 Non-volatile memory devices and methods of fabricating the same
05/10/2005US6891221 Array architecture and process flow of nonvolatile memory devices for mass storage applications
05/10/2005US6891220 Method of programming electrons onto a floating gate of a non-volatile memory cell
05/10/2005US6891219 Metal-insulator-metal capacitor formed by damascene processes between metal interconnect layers and method of forming same
05/10/2005US6891218 Semiconductor device and method of manufacturing same
05/10/2005US6891217 Capacitor with discrete dielectric material
05/10/2005US6891216 Test structure of DRAM
05/10/2005US6891215 Capacitors
05/10/2005US6891213 Base current reversal SRAM memory cell and method
05/10/2005US6891212 Magnetic memory device having soft reference layer
05/10/2005US6891211 Ferroelectric random access memory device and method for fabricating the same
05/10/2005US6891210 Semiconductor device having a protection circuit
05/10/2005US6891209 Dynamic random access memory trench capacitors
05/10/2005US6891208 Protection structure against electrostatic discharges (ESD) for an electronic device integrated on a SOI substrate, and corresponding integration process
05/10/2005US6891207 Electrostatic discharge protection networks for triple well semiconductor devices
05/10/2005US6891198 Film carrier tape for mounting an electronic part
05/10/2005US6891197 Semiconductor LED flip-chip with dielectric coating on the mesa
05/10/2005US6891196 Active matrix substrate and manufacturing method therefor
05/10/2005US6891195 Semiconductor device and method of fabricating the same
05/10/2005US6891192 Structure and method of making strained semiconductor CMOS transistors having lattice-mismatched semiconductor regions underlying source and drain regions
05/10/2005US6891190 Organic semiconductor device and method
05/10/2005US6891188 Semiconductor device including band-engineered superlattice
05/10/2005US6891175 Exposure apparatus and device manufacturing method using the same
05/10/2005US6891172 Differential pumping system and exposure apparatus
05/10/2005US6891169 Electron beam array write head system and method
05/10/2005US6891155 Dielectric film
05/10/2005US6891134 Integrally formed bake plate unit for use in wafer fabrication system
05/10/2005US6891131 Thermal processing system
05/10/2005US6891124 Apparatus for measuring temperatures of separate locations on substrate in plasma processing system, including substrate holder, broad band light source emitting range of wavelengths, light collectors for collecting portion of light transmitted
05/10/2005US6891123 Setting predetermined pressure, source power and bias power of chamber, flowing trifluoromethane and argon gases into chamber at predermined rate, introducing chlorine gas at predetermined flow rate, completing supply of chlorine gas, igniting plasma
05/10/2005US6891110 Circuit chip connector and method of connecting a circuit chip
05/10/2005US6891109 Monolithic ceramic substrate and method for making the same
05/10/2005US6891108 Semiconductor packages and methods for making the same
05/10/2005US6890875 Tunable devices incorporating BiCu3Ti3FeO12
05/10/2005US6890870 Method for controlling electrical conductivity
05/10/2005US6890869 Low-dielectric silicon nitride film and method of forming the same, semiconductor device and fabrication process thereof
05/10/2005US6890868 Process for depositing gelable composition that includes dissolving gelable composition in liquid with agitating to disrupt gelling
05/10/2005US6890867 Transistor fabrication methods comprising selective wet-oxidation
05/10/2005US6890866 Method for manufacturing semiconductor device
05/10/2005US6890865 Low k film application for interlevel dielectric and method of cleaning etched features
05/10/2005US6890864 Semiconductor device fabricating method and treating liquid
05/10/2005US6890863 Etchant and method of use
05/10/2005US6890862 Processes for vacuum treating workpieces, and corresponding process equipment
05/10/2005US6890860 Method for etching and/or patterning a silicon-containing layer
05/10/2005US6890859 Methods of forming semiconductor structures having reduced defects, and articles and devices formed thereby
05/10/2005US6890858 Methods of forming materials over uneven surface topologies, and methods of forming insulative materials over and between conductive lines
05/10/2005US6890857 Semiconductor device having a multilayer wiring structure and pad electrodes protected from corrosion, and method for fabricating the same
05/10/2005US6890856 Method for eliminating process byproduct during fabrication of liquid crystal display
05/10/2005US6890855 Process of removing residue material from a precision surface
05/10/2005US6890854 Method and apparatus for performing nickel salicidation
05/10/2005US6890853 Method of depositing metal film and metal deposition cluster tool including supercritical drying/cleaning module
05/10/2005US6890852 Semiconductor device and manufacturing method of the same
05/10/2005US6890851 Interconnection structure and fabrication method thereof
05/10/2005US6890850 Method of depositing dielectric materials in damascene applications
05/10/2005US6890849 Interconnect, interconnect forming method, thin film transistor, and display device
05/10/2005US6890848 Fabrication process of a semiconductor device
05/10/2005US6890847 Polynorbornene foam insulation for integrated circuits
05/10/2005US6890846 Method for manufacturing semiconductor integrated circuit device
05/10/2005US6890845 Chip scale surface mounted device and process of manufacture
05/10/2005US6890843 Methods of forming semiconductor structures
05/10/2005US6890842 Method of forming a thin film transistor
05/10/2005US6890841 Methods of forming integrated circuit memory devices that include a plurality of landing pad holes that are arranged in a staggered pattern and integrated circuit memory devices formed thereby
05/10/2005US6890840 Method of manufacturing a semiconductor device, utilizing a laser beam for crystallization
05/10/2005US6890839 Method and apparatus for laser annealing configurations of a beam
05/10/2005US6890838 Gettering technique for wafers made using a controlled cleaving process
05/10/2005US6890837 Method of manufacturing semiconductor device including steps of forming both insulating film and epitaxial semiconductor on substrate
05/10/2005US6890836 Scribe street width reduction by deep trench and shallow saw cut
05/10/2005US6890835 Layer transfer of low defect SiGe using an etch-back process
05/10/2005US6890833 Trench isolation employing a doped oxide trench fill
05/10/2005US6890832 Radiation hardening method for shallow trench isolation in CMOS
05/10/2005US6890831 Method of fabricating semiconductor device
05/10/2005US6890830 Semiconductor device and method for fabricating the same
05/10/2005US6890828 Method for supporting a bond pad in a multilevel interconnect structure and support structure formed thereby
05/10/2005US6890827 Method of fabricating a silicon on insulator transistor structure for imbedded DRAM
05/10/2005US6890826 Method of making bipolar transistor with integrated base contact and field plate
05/10/2005US6890825 Method for controlling dopant profiles and dopant activation by electron beam processing
05/10/2005US6890824 Semiconductor device and manufacturing method thereof
05/10/2005US6890823 Methods of forming integrated circuits with thermal oxide layers on side walls of gate electrodes wherein the source and drain are higher than the gate electrode
05/10/2005US6890822 Semiconductor device having multiple gate oxide layers and method of manufacturing thereof
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