Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2005
05/05/2005US20050093174 Reduced footprint packaged microelectronic components and methods for manufacturing such microelectronic components
05/05/2005US20050093172 Electronic circuit device, and method and apparatus for manufacturing the same
05/05/2005US20050093170 Integrated interconnect package
05/05/2005US20050093169 Semiconductor device and method of manufacturing semiconductor device
05/05/2005US20050093168 Semiconductor device and method of manufacturing the same
05/05/2005US20050093167 Semiconductor chip and semiconductor device
05/05/2005US20050093166 Semiconductor device and method of manufacturing the same
05/05/2005US20050093165 Semiconductor device and method of manufacturing the same
05/05/2005US20050093162 Adhesion layer of 11-trichlorosilylundecyl thioacetate coupled to a copper layer formed over a dielectric layer via the thioacetate group and a silicon dioxide layer via the trichlorosilyl group
05/05/2005US20050093161 Semiconductor device
05/05/2005US20050093160 Semiconductor device and method for fabricating the same
05/05/2005US20050093159 Stress-relief layer for semiconductor applications
05/05/2005US20050093158 Eliminates overlying exposure mask of photoresist
05/05/2005US20050093157 Electronic device and method of fabricating the same
05/05/2005US20050093156 Semiconductor apparatus and method of fabricating the same
05/05/2005US20050093155 Superior wettabilitiy and coverage; high throughput; high performance devices; chemical vaporization and sputtering application
05/05/2005US20050093154 Multiple gate semiconductor device and method for forming same
05/05/2005US20050093150 Semiconductor device and method of manufacturing the same
05/05/2005US20050093149 Semiconductor device and method of manufacturing the same
05/05/2005US20050093147 Structure for reducing leakage currents and high contact resistance for embedded memory and method for making same
05/05/2005US20050093146 Support body for semiconductor element, method for manufacturing the same and semiconductor device
05/05/2005US20050093144 Multi-chip module
05/05/2005US20050093142 Passive element chip and manufacturing method thereof, and highly integrated module and manufacturing method thereof
05/05/2005US20050093134 Device packages with low stress assembly process
05/05/2005US20050093131 Semiconductor device having metal plates and semiconductor chip
05/05/2005US20050093129 Semiconductor device and manufacturing method thereof
05/05/2005US20050093128 Semiconductor device, process of producing semiconductor device, and ink jet recording head
05/05/2005US20050093127 Multi-surface IC packaging structures and methods for their manufacture
05/05/2005US20050093126 Filp-chip sub-assembly, methods of making same and device including same
05/05/2005US20050093118 Semiconductor device
05/05/2005US20050093117 thickness and cost reduction
05/05/2005US20050093114 Tape circuit substrate and semiconductor apparatus employing the same
05/05/2005US20050093113 Thin film semiconductor package and method of fabrication
05/05/2005US20050093109 Nitrogen implementation to minimize device variation
05/05/2005US20050093108 Insulating layer having decreased dielectric constant and increased hardness
05/05/2005US20050093107 Thin dielectric layers on substrates, and methods of making the same
05/05/2005US20050093106 Fluid ejection device and method of fabricating the same
05/05/2005US20050093105 Semiconductor-on-insulator chip with<100>-oriented transistors
05/05/2005US20050093104 CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding
05/05/2005US20050093103 Shallow trench isolation and fabricating method thereof
05/05/2005US20050093102 Mixed lvr and hvr reticle set design for the processing of gate arrays, embedded arrays and rapid chip products
05/05/2005US20050093101 Method of Manufacturing Nitride Substrate for Semiconductors, and Nitride Semiconductor Substrate
05/05/2005US20050093100 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates
05/05/2005US20050093099 Method for fabricating group III nitride compound semiconductors and group III nitride compound semiconductor devices
05/05/2005US20050093098 Semiconductor device and method for fabricating the same
05/05/2005US20050093097 Enhanced substrate contact for a semiconductor device
05/05/2005US20050093096 Bipolar transistor for avoiding thermal runaway
05/05/2005US20050093093 Capacitor integration at top-metal level with a protective cladding for copper surface protection
05/05/2005US20050093090 Semiconductor device and manufacturing method thereof
05/05/2005US20050093089 Semiconductor device and method of manufacturing the same
05/05/2005US20050093085 Semiconductor device having silicon oxide film
05/05/2005US20050093084 Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same
05/05/2005US20050093083 Semiconductor device and process of fabricating same
05/05/2005US20050093082 Fin field effect transistors having capping insulation layers and methods for forming the same
05/05/2005US20050093081 Oxidation method for altering a film structure and cmos transistor structure formed therewith
05/05/2005US20050093080 Semiconductor device and method of manufacturing the same
05/05/2005US20050093079 Erasable and programmable read only memory (EPROM) device and method of manufacturing a semiconductor device having the same
05/05/2005US20050093078 Increasing carrier mobility in NFET and PFET transistors on a common wafer
05/05/2005US20050093077 CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding
05/05/2005US20050093076 METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES
05/05/2005US20050093075 Advanced technique for forming a transistor having raised drain and source regions
05/05/2005US20050093074 Method of fabricating a finfet
05/05/2005US20050093073 Low voltage NMOS-based electrostatic discharge lamp
05/05/2005US20050093071 Substrate based ESD network protection for a flip chip
05/05/2005US20050093070 Fully silicided NMOS device for electrostatic discharge protection
05/05/2005US20050093068 Method for manufacturing MOS transistor and semiconductor device employing MOS transistor made using the same
05/05/2005US20050093067 Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
05/05/2005US20050093066 Semiconductor device using partial SOI substrate and manufacturing method thereof
05/05/2005US20050093065 Method for fabricating thin film transistor with multiple gates using metal induced lateral crystallization
05/05/2005US20050093064 Semiconductor integrated circuit device
05/05/2005US20050093063 Multiple gate dielectric structure and method for forming
05/05/2005US20050093062 SOI component with increased dielectric strength and improved heat dissipation
05/05/2005US20050093061 Semiconductor device having a stacked gate insulation film and a gate electrode and manufacturing method thereof
05/05/2005US20050093060 A structure of a lateral diffusion mos transistor in widespread use as a power control device
05/05/2005US20050093059 Structure and method to improve channel mobility by gate electrode stress modification
05/05/2005US20050093058 Sonos device and methods of manufacturing the same
05/05/2005US20050093057 Common spacer dual gate memory cell and method for forming a nonvolatile memory array
05/05/2005US20050093056 Nonvolatile memory device and method for manufacturing the same
05/05/2005US20050093055 Flash memory and method thereof
05/05/2005US20050093054 Non-volatile memory devices and methods of fabricating the same
05/05/2005US20050093053 Discontinuous dielectric interface for bipolar transistors
05/05/2005US20050093052 Structurally-stabilized capacitors and method of making of same
05/05/2005US20050093051 Semiconductor device
05/05/2005US20050093050 One mask high density capacitor for integrated circuits
05/05/2005US20050093049 Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage capacitor
05/05/2005US20050093048 Deep trench capacitor having increased surface area
05/05/2005US20050093047 Semiconductor memory device and method of manufacturing the same
05/05/2005US20050093046 Plurality of capacitors employing holding layer patterns and method of fabricating the same
05/05/2005US20050093044 DRAM cell with buried collar and self-aligned buried strap
05/05/2005US20050093042 Semiconductor device and method of manufacturing the same
05/05/2005US20050093041 Illumination system having a nested collector for annular illumination of an exit pupil
05/05/2005US20050093040 Device and method for inhibiting oxidation of contact plugs in ferroelectric capacitor devices
05/05/2005US20050093038 Photodiode sensor and pixel sensor cell for use in an imaging device
05/05/2005US20050093037 Method of manufacturing a semiconductor device
05/05/2005US20050093036 CMOS image sensor and method for fabricating the same
05/05/2005US20050093035 Semiconductor device and manufacturing method of semiconductor device
05/05/2005US20050093034 Reducing dopant losses during annealing processes
05/05/2005US20050093033 Field effect transistor and manufacturing method thereof
05/05/2005US20050093032 Transistor having a germanium implant region located therein and a method of manufacture therefor
05/05/2005US20050093031 Devices having large organic semiconductor crystals and methods of making the same
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