Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2005
05/26/2005US20050112905 Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure
05/26/2005US20050112904 Clean chemistry for tungsten/tungsten nitride gates
05/26/2005US20050112903 Process for removing tungsten particles after tungsten etch-back
05/26/2005US20050112902 Method to make small isolated features with pseudo-planarization for TMR and MRAM applications
05/26/2005US20050112901 Removal of transition metal ternary and/or quaternary barrier materials from a substrate
05/26/2005US20050112900 Method of processing wafers with resonant heating
05/26/2005US20050112899 Methods and apparatus for cleaning semiconductor devices
05/26/2005US20050112898 Method for etching a substrate and a device formed using the method
05/26/2005US20050112897 Electrochemically polishing conductive films on semiconductor wafers
05/26/2005US20050112896 Multi-bit phase change memory cell and multi-bit phase change memory including the same, method of forming a multi-bit phase change memory, and method of programming a multi-bit phase change memory
05/26/2005US20050112895 Method of chemical-mechanical polishing
05/26/2005US20050112894 CMP slurry for forming aluminum film, CMP method using the slurry, and method for forming aluminum wiring using the CMP method
05/26/2005US20050112893 Method for producing a silicon wafer
05/26/2005US20050112892 Chemical mechanical abrasive slurry and method of using the same
05/26/2005US20050112891 Notch-free etching of high aspect SOI structures using a time division multiplex process and RF bias modulation
05/26/2005US20050112890 CVD apparatuses and methods of forming a layer over a semiconductor substrate
05/26/2005US20050112889 Semiconductor device manufacturing method and manufacturing line thereof
05/26/2005US20050112888 Semiconductor metal contamination reduction for ultra-thin gate dielectrics
05/26/2005US20050112887 Etching process
05/26/2005US20050112885 Process for manufacturing a substrate and associated substrate
05/26/2005US20050112884 Method for etching a tapered bore in a silicon substrate, and a semiconductor wafer comprising the substrate
05/26/2005US20050112883 System and method for removal of photoresist in transistor fabrication for integrated circuit manufacturing
05/26/2005US20050112880 Selective plating of package terminals
05/26/2005US20050112879 Insulation film etching method
05/26/2005US20050112878 Method for dry etching a semiconductor wafer
05/26/2005US20050112877 Method of manufacturing a semiconductor device
05/26/2005US20050112876 Method to form a robust TiCI4 based CVD TiN film
05/26/2005US20050112875 Method for reducing the contact resistance of the connection regions of a semiconductor device
05/26/2005US20050112873 Method for selective electroless attachment of contacts to electrochemically-active molecules
05/26/2005US20050112872 Fabrication of nanoscale thermoelectric devices
05/26/2005US20050112871 Multilevel copper interconnect with double passivation
05/26/2005US20050112870 Method of forming a contact plug in a semiconductor device
05/26/2005US20050112869 Method for fabricating semiconductor device
05/26/2005US20050112868 Method and apparatus for localized material removal by electrochemical polishing
05/26/2005US20050112867 Semiconductor device and manufacturing method thereof
05/26/2005US20050112866 Semiconductor device and method of manufacturing the same
05/26/2005US20050112865 Method for fabricating semiconductor device capable of preventing damages to conductive structure
05/26/2005US20050112864 Back End Interconnect With a Shaped Interface
05/26/2005US20050112863 Method for fabricating semiconductor device
05/26/2005US20050112862 Crystallographic Modification of Hard mask Properties
05/26/2005US20050112861 Roughened bonding pad and bonding wire surfaces for low pressure wire bonding
05/26/2005US20050112860 Method for manufacturing nano-gap electrode device
05/26/2005US20050112859 Method of forming a borderless contact opening featuring a composite tri-layer etch stop material
05/26/2005US20050112858 Contact hole forming method
05/26/2005US20050112857 Ultra-thin silicidation-stop extensions in mosfet devices
05/26/2005US20050112856 Seed layer treatment
05/26/2005US20050112855 Method and apparatus for doping semiconductors
05/26/2005US20050112854 Method for manufacturing a semiconductor device
05/26/2005US20050112853 System and method for non-destructive implantation characterization of quiescent material
05/26/2005US20050112852 Using acoustic energy to activate implanted species
05/26/2005US20050112851 Methods of forming semiconductor devices having multiple channel MOS transistors and related intermediate structures
05/26/2005US20050112850 Method of manufacturing a semiconductor device
05/26/2005US20050112848 Method of fabricating vertical integrated circuits
05/26/2005US20050112847 Method for separating wafers bonded together to form a stacked structure
05/26/2005US20050112846 Storage structure with cleaved layer
05/26/2005US20050112845 Method for fabricating a substrate with useful layer on high resistivity support
05/26/2005US20050112844 Apparatus for manufacturing semiconductor devices, method of manufacturing the semiconductor devices, and semiconductor device manufactured by the apparatus and method
05/26/2005US20050112843 Method for anodic bonding of wafers and device
05/26/2005US20050112842 Integrating passive components on spacer in stacked dies
05/26/2005US20050112841 Method for isolating semiconductor devices
05/26/2005US20050112840 Shallow trench isolation dummy pattern and layout method using the same
05/26/2005US20050112839 Method of selectively etching HSG layer in deep trench capacitor fabrication
05/26/2005US20050112838 Method for forming inductor of semiconductor device
05/26/2005US20050112837 Method of fabricating a bipolar junction transistor
05/26/2005US20050112836 MIM capacitor structure and method of fabrication
05/26/2005US20050112835 Method for fabricating transistor of semiconductor device
05/26/2005US20050112834 Method of manufacturing a semiconductor device
05/26/2005US20050112833 Method of fabricating a robust gate dielectric using a replacement gate flow
05/26/2005US20050112832 Method of manufacturing semiconductor device
05/26/2005US20050112831 Method and apparatus for forming a semiconductor substrate with a layer structure of activated dopants
05/26/2005US20050112830 Ultra shallow junction formation
05/26/2005US20050112829 Semiconductor device with silicided source/drains
05/26/2005US20050112828 Method to form flash memory with very narrow polysilicon spacing
05/26/2005US20050112827 High permittivity silicate gate dielectric
05/26/2005US20050112826 Method of fabricating high voltage transistor
05/26/2005US20050112825 Method for manufacturing a semiconductor device
05/26/2005US20050112824 Method of forming gate oxide layers with multiple thicknesses on substrate
05/26/2005US20050112823 Trench power MOSFET with reduced gate resistance
05/26/2005US20050112822 Method in the fabrication of a monolithically integrated high frequency circuit
05/26/2005US20050112821 Method of manufacturing split-gate memory
05/26/2005US20050112820 Method for fabricating flash memory device and structure thereof
05/26/2005US20050112819 Methods of forming capacitor structures including L-shaped cavities and related structures
05/26/2005US20050112818 Capacitor structure having hemispherical grains
05/26/2005US20050112817 Semiconductor device having high drive current and method of manufacture thereof
05/26/2005US20050112815 Silicon-oxide-nitride-oxide-silicon (SONOS) memory device and methods of manufacturing and operating the same
05/26/2005US20050112814 Method of fabricating CMOS transistor that prevents gate thinning
05/26/2005US20050112813 Method for manufacturing transistor and image display device using the same
05/26/2005US20050112812 Method for forming narrow trench structures
05/26/2005US20050112811 Ultra-thin soi mosfet method and structure
05/26/2005US20050112809 Method for crystallizing amorphous silicon film
05/26/2005US20050112808 Metal-oxide-semiconductor device formed in silicon-on-insulator
05/26/2005US20050112807 Thin film transistor, method of fabricating the same and flat panel display using thin film transistor
05/26/2005US20050112806 Method of forming silicon oxide layer and method of manufacturing thin film transistor thereby
05/26/2005US20050112805 Method for manufacturing semiconductor device
05/26/2005US20050112803 Semiconductor device and its manufacturing method, and semiconductor device manufacturing system
05/26/2005US20050112802 System and method for improved auto-boating
05/26/2005US20050112800 Semiconductor device and method of fabricating the same
05/26/2005US20050112799 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding
05/26/2005US20050112798 Electronics circuit manufacture
05/26/2005US20050112797 Wiring base, semiconductor device manufacturing method thereof and electronic equipment
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