Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2005
05/19/2005US20050106857 Method of manufacturing semiconductor device
05/19/2005US20050106856 Dual damascene process flow for porous low-k materials
05/19/2005US20050106855 Method for fabricating a semiconductor component using contact printing
05/19/2005US20050106853 Method for forming metal wire in semiconductor device
05/19/2005US20050106852 Air gap interconnect structure and method
05/19/2005US20050106851 Wire bonding process for copper-metallized integrated circuits
05/19/2005US20050106850 Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETs
05/19/2005US20050106849 Method for growing group-III nitride semiconductor heterostructure on silicon substrate
05/19/2005US20050106848 System and method for stress free conductor removal
05/19/2005US20050106847 Method of manufacturing semiconductor device and method of treating semiconductor surface
05/19/2005US20050106845 Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same
05/19/2005US20050106844 Method of fabricating a MOSFET device
05/19/2005US20050106843 Manufacturing method of semiconductor device
05/19/2005US20050106842 Method of forming a polysilicon layer comprising microcrystalline grains
05/19/2005US20050106841 Method of fabricating a polysilicon layer
05/19/2005US20050106840 Method of manufacturing semiconductor wafer
05/19/2005US20050106839 Transfer method, method of manufacturing thin film devices, method of maufacturing integrated circuits, circuit board and manufacturing method thereof, electro-optical apparatus and manufacturing method thereof, IC card, and electronic appliance
05/19/2005US20050106838 Semiconductor devices with a source/drain formed on a recessed portion of an isolation layer and methods of fabricating the same
05/19/2005US20050106837 Method for manufacturing a semiconductor device
05/19/2005US20050106836 Deep trench isolation of embedded dram for improved latch-up immunity
05/19/2005US20050106835 Trench isolation structure and method of manufacture therefor
05/19/2005US20050106834 Method and apparatus for filling vias
05/19/2005US20050106833 Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same
05/19/2005US20050106832 Dynamic random access memory cell and method for fabricating the same
05/19/2005US20050106831 Method for fabricating a trench capacitor
05/19/2005US20050106830 Semiconductor device and method of manufacturing the same
05/19/2005US20050106829 Polysilicon bipolar transistor and method of manufacturing it
05/19/2005US20050106828 Switching regulator with high-side p-type device
05/19/2005US20050106827 Semiconductor device and its manufacturing method
05/19/2005US20050106826 Method for manufacturing semiconductor device
05/19/2005US20050106825 Method of fabricating a lateral double-diffused mosfet (LDMOS) transistor and a conventional CMOS transistor
05/19/2005US20050106824 Method for suppressing transient enhanced diffusion of dopants in silicon
05/19/2005US20050106823 MOSFET structure and method of fabricating the same
05/19/2005US20050106822 Method of manufacturing flash memory device
05/19/2005US20050106821 Transistor having high dielectric constant gate insulating layer and source and drain forming Schottky contact with substrate
05/19/2005US20050106820 Dram access transistor and method of formation
05/19/2005US20050106819 Method of fabricating a memory device having a self-aligned contact
05/19/2005US20050106818 [memory device and fabrication method thereof]
05/19/2005US20050106817 Embedded eeprom cell and method of forming the same
05/19/2005US20050106816 Method of manufacturing a semiconductor memory device
05/19/2005US20050106815 Method for fabricating memory components
05/19/2005US20050106814 Method of manufacturing NAND flash device
05/19/2005US20050106813 Method of manufacturing flash memory device
05/19/2005US20050106812 Multi-bit non-volatile integrated circuit memory and method therefor
05/19/2005US20050106811 NROM flash memory devices on ultrathin silicon
05/19/2005US20050106810 Stress assisted current driven switching for magnetic memory applications
05/19/2005US20050106809 Reduced cell-to-cell shorting for memory arrays
05/19/2005US20050106808 Semiconductor devices having at least one storage node and methods of fabricating the same
05/19/2005US20050106806 Methods of forming a double-sided capacitor or a contact using a sacrificial structure
05/19/2005US20050106805 High value split poly P-resistor with low standard deviation
05/19/2005US20050106804 Electrical contacts for molecular electronic transistors
05/19/2005US20050106803 Production managing system of semiconductor device
05/19/2005US20050106802 Method for forming thin film
05/19/2005US20050106801 Method of manufacturing a semiconductor device having a silicide film
05/19/2005US20050106800 CMOS well structure and method of forming the same
05/19/2005US20050106799 Stressed semiconductor device structures having granular semiconductor material
05/19/2005US20050106798 Semiconductor device and method for fabricating the same
05/19/2005US20050106797 Encapsulated MOS transistor gate structures and methods for making the same
05/19/2005US20050106795 Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines
05/19/2005US20050106794 Method of manufacturing a semiconductor device
05/19/2005US20050106793 Precision creation of inter-gates insulator
05/19/2005US20050106792 Transistor with strain-inducing structure in channel
05/19/2005US20050106791 Lateral double-diffused MOSFET
05/19/2005US20050106790 Strained silicon on a SiGe on SOI substrate
05/19/2005US20050106789 Method for producing an SOI field effect transistor and corresponding field effect transistor
05/19/2005US20050106788 Method and process to make multiple-threshold metal gates CMOS technology
05/19/2005US20050106787 Thin film transistor array substrate and method for manufacturing the same
05/19/2005US20050106786 Method of manufacturing a semiconductor device
05/19/2005US20050106784 Method and apparatus for forming a flip chip semiconductor package and method for producing a substrate for the flip chip semiconductor package
05/19/2005US20050106783 Method of fabricating lead frame and method of fabricating semiconductor device using the same, and lead frame and semiconductor device using the same
05/19/2005US20050106782 Wafer processing method
05/19/2005US20050106781 Method of manufacturing semiconductor device, semiconductor device, circuit board, and electronic instrument
05/19/2005US20050106780 Semiconductor/printed circuit board assembly, and computer system
05/19/2005US20050106778 In-line die attaching and curing apparatus for a multi-chip package
05/19/2005US20050106777 Frame for semiconductor package
05/19/2005US20050106776 Method of manufacturing organic electroluminescent display device and organic electroluminescent display device, and display device equipped with organic electroluminescent display device
05/19/2005US20050106775 Pattern forming method, film structure, electro-optical apparatus, and electronic device
05/19/2005US20050106774 Surface processes in fabrications of microstructures
05/19/2005US20050106773 Single poly CMOS imager
05/19/2005US20050106771 Group III-V compound semiconductor and group III-V compound semiconductor device using the same
05/19/2005US20050106768 Active matrix substrate, method of manufacturing active matrix substrate, and intermediate transfer substrate for manufacturing active matrix substrate
05/19/2005US20050106767 Manufacturing method of optical semiconductor integrated circuit device
05/19/2005US20050106766 Method of fabricating laser diode
05/19/2005US20050106765 Methods of testing/stressing a charge trapping device
05/19/2005US20050106764 Test pattern for reliability measurement of copper interconnection line having moisture window and method for manufacturing the same
05/19/2005US20050106762 Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics
05/19/2005US20050106761 Ferroelectric capacitors with metal oxide for inhibiting fatigue
05/19/2005US20050106760 Method for increasing ferroelectric characteristics of polymer memory cells
05/19/2005US20050106759 Device and method for forming ferroelectric capacitor devices and FeRAM devices
05/19/2005US20050106737 Protection of semiconductor fabrication and similar sensitive processes
05/19/2005US20050106618 Preparing microarray comprising forming plurality of probe arrays on wafer, separating said wafer into plurality of chips, mating at least one chip to multicompartment reaction chamber; microfluidics; high throughput assay
05/19/2005US20050106617 Preparing microarray comprising forming plurality of probe arrays on wafer, separating said wafer into plurality of chips, mating at least one chip to multicompartment reaction chamber; microfluidics; high throughput assay
05/19/2005US20050106615 Bioarray chip reaction apparatus and its manufacture
05/19/2005US20050106524 Heat treatment device and heat treatment method
05/19/2005US20050106511 Developing method, substrate treating method, and substrate treating apparatus
05/19/2005US20050106508 fabricating a device wherein an uneven configuration is formed in the device having a crystalline region and an amorphous region by selectively removing any one of said crystalline region and said amorphous region
05/19/2005US20050106497 melamine derivative, a polyvinylphenol type polymer, a photoacid generator, and an organic solvent
05/19/2005US20050106494 high resolution; pendant solubility inhibiting acid-labile moieties that have low activation energy for the acid-catalyzed cleaving or deprotection reaction; effective at wavelengths 193 nm and below
05/19/2005US20050106492 Carboxyl group-containing acidic compound, basic alkanolamines or quaternary ammonium hydroxides, water, a sulfur-containing corrosion inhibitor and acidic ph; corrosion protection of copper, aluminum wirings with efficient stripping of photoresist, never damages interlevel films
05/19/2005US20050106480 Mask, exposure method, line width measuring method, and method for manufacturing semiconductor devices
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