Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2005
05/31/2005US6900106 Methods of forming capacitor constructions
05/31/2005US6900105 Semiconductor device and method of manufacture
05/31/2005US6900104 Method of forming offset spacer manufacturing for critical dimension precision
05/31/2005US6900103 Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
05/31/2005US6900102 Methods of forming double gate electrodes using tunnel and trench
05/31/2005US6900101 LDMOS transistors and methods for making the same
05/31/2005US6900100 Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same
05/31/2005US6900099 Flash memory cell and method for fabricating the same
05/31/2005US6900098 Twin insulator charge storage device operation and its fabrication method
05/31/2005US6900097 Method for forming single-level electrically erasable and programmable read only memory operated in environment with high/low-voltage
05/31/2005US6900096 Method of manufacturing a flash memory cell
05/31/2005US6900095 Hydrogen barrier layer and method for fabricating semiconductor device having the same
05/31/2005US6900094 Method of selective removal of SiGe alloys
05/31/2005US6900093 Method of fabricating a zener diode chip for use as a shunt in Christmas tree lighting
05/31/2005US6900092 Surface engineering to prevent epi growth on gate poly during selective epi processing
05/31/2005US6900091 Isolated complementary MOS devices in epi-less substrate
05/31/2005US6900090 Semiconductor device having a trench isolation structure and method for fabricating the same
05/31/2005US6900089 Non-volatile memory device
05/31/2005US6900088 Semiconductor device and its manufacture method
05/31/2005US6900087 Symmetric inducting device for an integrated circuit having a ground shield
05/31/2005US6900086 Semiconductor device having MISFETs
05/31/2005US6900084 Semiconductor device having a display device
05/31/2005US6900083 Method of forming multi-layers for a thin film transistor
05/31/2005US6900082 Methods for forming laterally crystallized polysilicon and devices fabricated therefrom
05/31/2005US6900081 Method of manufacturing semiconductor integrated circuit device
05/31/2005US6900080 Microelectronic package with reduced underfill and methods for forming such packages
05/31/2005US6900079 Method for fabricating a chip scale package using wafer level processing
05/31/2005US6900077 Methods of forming board-on-chip packages
05/31/2005US6900076 Methods for manufacturing semiconductor chips, methods for manufacturing semiconductor devices, semiconductor chips, semiconductor devices, connection substrates and electronic devices
05/31/2005US6900075 Mixed LVR and HVR reticle set design for the processing of gate arrays, embedded arrays and rapid chip products
05/31/2005US6900073 Fast firing flattening method and apparatus for sintered multilayer ceramic electronic substrates
05/31/2005US6900071 Substrate and method for producing the same, and thin film structure
05/31/2005US6900070 Dislocation reduction in non-polar gallium nitride thin films
05/31/2005US6900067 Growth of III-nitride films on mismatched substrates without conventional low temperature nucleation layers
05/31/2005US6900066 Cold cathode field emission device and process for the production thereof, and cold cathode field emission display and process for the production thereof
05/31/2005US6900064 Method for manufacturing NAND type nonvolatile ferroelectric memory cell
05/31/2005US6900063 Methods and apparatuses for producing a polymer memory device
05/31/2005US6900062 Method of manufacturing a semiconductor device utilizing active oxygen
05/31/2005US6900002 Antireflective bi-layer hardmask including a densified amorphous carbon layer
05/31/2005US6900000 Depositing an antireflective compound in a layer on said substrate surface by chemical vapor deposition; and applying a photoresist layer to said antireflective compound layer to yield the circuit precursor.
05/31/2005US6899995 Protecting groups in polymers, photoresists and processes for microlithography
05/31/2005US6899991 Photo-curable resin composition, patterning process, and substrate protecting film
05/31/2005US6899990 Epoxy compound having alicyclic structure, polymer, resist composition and patterning process
05/31/2005US6899989 A optionally substituted triphenylsulfonium benzenesulfonate acid generator; resin containing vinylphenol units and 1-alkoxyalkoxystyrene units
05/31/2005US6899960 Microelectronic or optoelectronic package having a polybenzoxazine-based film as an underfill material
05/31/2005US6899919 Immersion electrode in electroconductivity solutions; precipitation particles; bonding; controlling thickness
05/31/2005US6899858 Vapor deposition; cooling hafnium tetrachloride; adding fuming nitric acid, heating; refluxing
05/31/2005US6899857 Method for forming a region of low dielectric constant nanoporous material using a microemulsion technique
05/31/2005US6899821 Mixture of oxidizer and film forming agent
05/31/2005US6899818 Method and composition for removing sodium-containing material from microcircuit substrates
05/31/2005US6899817 Device and method for etching a substrate using an inductively coupled plasma
05/31/2005US6899816 Electroless deposition method
05/31/2005US6899815 Multi-layer integrated circuit package
05/31/2005US6899804 Electrolyte composition and treatment for electrolytic chemical mechanical polishing
05/31/2005US6899799 Providing a sputtering gas into a chamber at a pressure below 20 mTorr, applying radio frequency to a coil to ionize the sputtering gas to form a plasma, sputtering a target to sputter target material toward a workpiece
05/31/2005US6899798 Reusable ceramic-comprising component which includes a scrificial surface layer
05/31/2005US6899796 Two-step method of filling copper into a high-aspect ratio via or dual-damascene structure; first, sputtering copper into a hole in the dielectric at less than 100 degrees C, filling 1/3 of the hole; second, completely filling the hole
05/31/2005US6899789 Method of holding substrate and substrate holding system
05/31/2005US6899788 Article holders that use gas vortices to hold an article in a desired position
05/31/2005US6899785 Method of stabilizing oxide etch and chamber performance using seasoning
05/31/2005US6899767 Method of cleaning processing chamber of semiconductor processing apparatus
05/31/2005US6899766 Vacuum chamber for plasma treatment; imparting mechanical oscillation to the apparatus and detecting oscillation generated
05/31/2005US6899765 Chamber elements defining a movable internal chamber
05/31/2005US6899764 Chemical vapor deposition reactor and process chamber for said reactor
05/31/2005US6899763 Lid cooling mechanism and method for optimized deposition of low-K dielectric using TR methylsilane-ozone based processes
05/31/2005US6899762 Epitaxially coated semiconductor wafer and process for producing it
05/31/2005US6899758 Method and apparatus for growing single crystal
05/31/2005US6899611 Polishing pad for a semiconductor device having a dissolvable substance
05/31/2005US6899609 CMP equipment for use in planarizing a semiconductor wafer
05/31/2005US6899607 Polishing systems for use with semiconductor substrates including differential pressure application apparatus
05/31/2005US6899604 Dressing apparatus and polishing apparatus
05/31/2005US6899603 Polishing apparatus
05/31/2005US6899602 Porous polyurethane polishing pads
05/31/2005US6899598 For chemical-mechanical polishing; combining a polymer resin with a supercritical gas to produce a single phase solution and forming a pad from the solution; gas is generated by subjecting a gas to an elevated temperature and pressure.
05/31/2005US6899597 Chemical mechanical polishing (CMP) process using fixed abrasive pads
05/31/2005US6899596 Chemical mechanical polishing of dual orientation polycrystalline materials
05/31/2005US6899548 Electrical connector having a cored contact assembly
05/31/2005US6899544 Integrated circuit device and wiring board
05/31/2005US6899534 Mold assembly for a package stack via bottom-leaded plastic (blp) packaging
05/31/2005US6899533 Apparatus for making semiconductor device
05/31/2005US6899507 Semiconductor processing apparatus comprising chamber partitioned into reaction and transfer sections
05/31/2005US6899164 Heat sink with guiding fins
05/31/2005US6899145 Front opening unified pod
05/31/2005US6899116 Pressure vessel systems and methods for dispensing liquid chemical compositions
05/31/2005US6899111 Fluid is flowed into the processing cavity at an angle relative to a radial line of the substrate to induce and/or control rotation of the substrate during cleaing and drying
05/31/2005US6899110 Cleaning method and apparatus
05/31/2005US6899109 Method and apparatus for reducing He backside faults during wafer processing
05/31/2005US6898974 Semiconductor dynamic quantity sensor
05/31/2005US6898851 Electronic device manufacturing method
05/31/2005US6898850 Method of manufacturing circuit board and communication appliance
05/31/2005US6898849 Method for controlling wire balls in electronic bonding
05/31/2005US6898848 Method of bonding inner leads to chip pads
05/31/2005US6898845 Method for manufacturing hybrid electronic circuits for active implantable medical devices
05/26/2005WO2005048422A1 High-frequency signal transmitting optical module and method of fabricating the same
05/26/2005WO2005048364A1 Light emitting devices with self aligned ohmic contact and methods of fabricating same
05/26/2005WO2005048363A2 Methods of processing semiconductor wafer backsides having light emitting devices (leds) thereon and leds so formed
05/26/2005WO2005048354A1 Semiconductor element, method for manufacturing the same, liquid crystal display device, and method for manufacturing the same
05/26/2005WO2005048353A1 Method for manufacturing liquid crystal display device
05/26/2005WO2005048352A1 Trench gate field effect devices
05/26/2005WO2005048351A1 Igbt cathode design with improved safe operating area capability