Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2005
06/07/2005US6903407 Non volatile charge trapping dielectric memory cell structure with gate hole injection erase
06/07/2005US6903406 Cells of nonvolatile memory device with high inter-layer dielectric constant
06/07/2005US6903405 Semiconductor memory device with a pair of floating gates
06/07/2005US6903404 Semiconductor memory device and method for manufacturing the same
06/07/2005US6903403 Exemplary memory cell in exemplary memory array includes ferromagnetic annular data layer having an opening enabling second conductor to electrically contact first conductor, an intermediate layer, a soft reference layer
06/07/2005US6903402 Interdigital capacitor having a cutting target portion
06/07/2005US6903401 Semiconductor devices with conductive lines that are laterally offset relative to corresponding contacts
06/07/2005US6903400 Magnetoresistive memory apparatus
06/07/2005US6903399 Antiferromagnetically stabilized pseudo spin valve for memory applications
06/07/2005US6903398 Semiconductor device and method for manufacturing same
06/07/2005US6903397 Method for manufacturing non-volatile memory device and non-volatile memory device and semiconductor device
06/07/2005US6903393 Semiconductor device fabricated on surface of silicon having <110> direction of crystal plane and its production method
06/07/2005US6903392 Semiconductor device and its manufacturing method
06/07/2005US6903390 Single metal programmability in a customizable integrated circuit device
06/07/2005US6903388 Hetero-junction bipolar transistor and manufacturing method thereof
06/07/2005US6903387 Semiconductor device
06/07/2005US6903386 Transistor with means for providing a non-silicon-based emitter
06/07/2005US6903384 System and method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications
06/07/2005US6903383 Semiconductor device having a high breakdown voltage for use in communication systems
06/07/2005US6903375 Solid-state image device, camera using the same, and method of manufacturing the same
06/07/2005US6903373 SiC MOSFET for use as a power switch and a method of manufacturing the same
06/07/2005US6903372 Semiconductor device, method of making the same and liquid crystal display device
06/07/2005US6903371 Thin film transistor and display using the same
06/07/2005US6903370 Variable quality semiconductor film substrate
06/07/2005US6903368 Thin-film transistor device, its manufacturing process, and image display using the device
06/07/2005US6903367 Programmable memory address and decode circuits with vertical body transistors
06/07/2005US6903366 Chemically synthesized and assembled electronic devices
06/07/2005US6903365 Electronic device using carbon element linear structure and production method thereof
06/07/2005US6903353 Charged particle beam exposure apparatus, device manufacturing method, and charged particle beam applied apparatus
06/07/2005US6903352 Charged-particle beam exposure apparatus, charged-particle beam exposure method, control data determination method, and device manufacturing method using this method
06/07/2005US6903348 Wafer holding apparatus for ion implanting system
06/07/2005US6903345 Electron optical system, charged-particle beam exposure apparatus using the same, and device manufacturing method
06/07/2005US6903338 Automated electron-beam inspection systems for semiconductor manufacturing
06/07/2005US6903322 Solid-state imaging device and method for producing the same
06/07/2005US6903303 Method and equipment for welding conductors to substrates
06/07/2005US6903278 Arrangements to provide mechanical stiffening elements to a thin-core or coreless substrate
06/07/2005US6903270 Method and structure for securing a mold compound to a printed circuit board
06/07/2005US6903032 Method for preparing a semiconductor wafer surface
06/07/2005US6903031 In-situ-etch-assisted HDP deposition using SiF4 and hydrogen
06/07/2005US6903030 System and method for heat treating semiconductor
06/07/2005US6903029 Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structure
06/07/2005US6903028 Soft-landing etching method using doping level control
06/07/2005US6903027 Method of forming dielectric film and dielectric film
06/07/2005US6903026 Sputter etch methods
06/07/2005US6903025 Method of purging semiconductor manufacturing apparatus and method of manufacturing semiconductor device
06/07/2005US6903024 Method of manufacturing storage nodes of a semiconductor memory device using a two-step etching process
06/07/2005US6903023 In-situ plasma etch for TERA hard mask materials
06/07/2005US6903022 Method of forming contact hole
06/07/2005US6903021 Method of polishing a semiconductor device
06/07/2005US6903020 Method of forming buried wiring in semiconductor device
06/07/2005US6903019 CMP process leaving no residual oxide layer or slurry particles
06/07/2005US6903018 Methods and apparatuses for planarizing microelectronic substrate assemblies
06/07/2005US6903017 Integrated circuit metallization using a titanium/aluminum alloy
06/07/2005US6903016 Combined conformal/non-conformal seed layers for metallic interconnects
06/07/2005US6903015 Method of manufacturing a semiconductor device using a wet process
06/07/2005US6903014 Low temperature reflow method for filling high aspect ratio contacts
06/07/2005US6903013 Method to fill a trench and tunnel by using ALD seed layer and electroless plating
06/07/2005US6903012 Sloped via contacts
06/07/2005US6903011 Displacement method to grow cu overburden
06/07/2005US6903010 Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer
06/07/2005US6903009 Methods for fabricating a contact for an integrated circuit
06/07/2005US6903008 Method for forming an interconnection in a semiconductor element
06/07/2005US6903007 Process for forming bottom anti-reflection coating for semiconductor fabrication photolithography which inhibits photoresist footing
06/07/2005US6903006 Mechanical strength, thermal resistance, and adhesion to a substrate
06/07/2005US6903005 Method for the formation of RuSixOy-containing barrier layers for high-k dielectrics
06/07/2005US6903004 Method of making a semiconductor device having a low K dielectric
06/07/2005US6903002 Low-k dielectric layer with air gaps
06/07/2005US6903001 Techniques to create low K ILD for BEOL
06/07/2005US6903000 System for improving thermal stability of copper damascene structure
06/07/2005US6902999 Pattern formation method
06/07/2005US6902998 Methods of manufacturing semiconductor devices having storage nodes
06/07/2005US6902997 Process of forming bonding columns
06/07/2005US6902995 Ring positionable about a periphery of a contact pad, semiconductor device components including same, and methods for positioning the ring around a contact pad
06/07/2005US6902994 Method for fabricating transistor having fully silicided gate
06/07/2005US6902993 Gate electrode for MOS transistors
06/07/2005US6902992 Method of fabricating semiconductor device having semiconductor resistance element
06/07/2005US6902991 Semiconductor device having a thick strained silicon layer and method of its formation
06/07/2005US6902990 Semiconductor device separation using a patterned laser projection
06/07/2005US6902989 Method for manufacturing gallium nitride (GaN) based single crystalline substrate that include separating from a growth substrate
06/07/2005US6902988 Method for treating substrates for microelectronics and substrates obtained by said method
06/07/2005US6902987 Method for low temperature bonding and bonded structure
06/07/2005US6902985 Method of forming a rough (high surface area) electrode from Ti and TiN capacitors and semiconductor devices including same
06/07/2005US6902984 Methods of forming void regions, dielectric regions and capacitor constructions
06/07/2005US6902983 Method for manufacturing semiconductor device and capacitor
06/07/2005US6902982 Trench capacitor and process for preventing parasitic leakage
06/07/2005US6902981 Structure and process for a capacitor and other devices
06/07/2005US6902980 Method of fabricating a high performance MOSFET device featuring formation of an elevated source/drain region
06/07/2005US6902979 Method for manufacturing mask ROM
06/07/2005US6902978 Method of making the selection gate in a split-gate flash EEPROM cell and its structure
06/07/2005US6902977 Method for forming polysilicon gate on high-k dielectric and related structure
06/07/2005US6902976 Semiconductor device and method of manufacturing the same
06/07/2005US6902975 Non-volatile memory technology compatible with 1T-RAM process
06/07/2005US6902974 Fabrication of conductive gates for nonvolatile memories from layers with protruding portions
06/07/2005US6902973 Hemi-spherical grain silicon enhancement
06/07/2005US6902971 Transistor sidewall spacer stress modulation
06/07/2005US6902970 Integrated circuit including, and fabrication method for producing, bipolar and MOSFET transistors
06/07/2005US6902969 Process for forming dual metal gate structures
06/07/2005US6902968 Method for manufacturing a MOS transistor that prevents contact spiking and semiconductor device employing a MOS transistor made using the same
06/07/2005US6902967 Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action
06/07/2005US6902966 Low-temperature post-dopant activation process
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