Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2005
12/29/2005US20050285306 Mold cleaning sheet and manufacturing method of a semiconductor device using the same
12/29/2005US20050285283 Angled elongated features for improved alignment process integration
12/29/2005US20050285282 Tray for semiconductor device and semiconductor device
12/29/2005US20050285279 Method and structure for manufacturing improved yield semiconductor packaged devices
12/29/2005US20050285277 Circuit film with bump, film package using the same, and related fabrication methods
12/29/2005US20050285276 Semiconductor device and ferroelectric memory, and method for manufacturing semiconductor device
12/29/2005US20050285275 Fabrication of nano-gap electrode arrays by the construction and selective chemical etching of nano-crosswire stacks
12/29/2005US20050285274 Lead solder indicator and method
12/29/2005US20050285273 Copper alloy sputtering target and semiconductor element wiring
12/29/2005US20050285272 Conductive structures in integrated circuits
12/29/2005US20050285271 Method of manufacturing a semiconductor wafer device having separated conductive patterns in peripheral area
12/29/2005US20050285270 Capacitors in semiconductor devices and methods of fabricating the same
12/29/2005US20050285269 Substantially void free interconnect formation
12/29/2005US20050285268 Alternative interconnect structure for semiconductor devices
12/29/2005US20050285267 Interconnect alloys and methods and apparatus using same
12/29/2005US20050285266 Arrangement for increasing the reliability of substrate-based BGA packages
12/29/2005US20050285262 Semiconductor device with wire bond inductor and method
12/29/2005US20050285259 Semiconductor device with magnetically permeable heat sink
12/29/2005US20050285258 Semiconductor package with exposed heat sink and the heat sink thereof
12/29/2005US20050285257 Encapsulated device with heat isolating structure
12/29/2005US20050285256 Methods of forming semiconductor constructions
12/29/2005US20050285255 Device and method for tilted land grid array interconnects on a coreless substrate package
12/29/2005US20050285254 Semiconducting device having stacked dice
12/29/2005US20050285253 Forming buried via hole substrates
12/29/2005US20050285251 Method of fabricating TFT array panel using aluminum wiring line and TFT array panel using the same method
12/29/2005US20050285245 Substrate strip for a transparent package
12/29/2005US20050285244 Method of embedding semiconductor element in carrier and embedded structure thereof
12/29/2005US20050285242 Lids for wafer-scale optoelectronic packages
12/29/2005US20050285241 Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same
12/29/2005US20050285240 Semiconductor device and method of manufacturing the same
12/29/2005US20050285239 Ultra thin dual chip image sensor package structure and method for fabrication
12/29/2005US20050285238 Integrated transistor module and method of fabricating same
12/29/2005US20050285237 Leadframe alteration to direct compound flow into package
12/29/2005US20050285235 Multi-chip semiconductor connector and method
12/29/2005US20050285233 Thin film transistor (TFT) device structure employing silicon rich silicon oxide passivation layer
12/29/2005US20050285232 Semiconductor constructions
12/29/2005US20050285231 Semiconductor device and method for manufacturing the same
12/29/2005US20050285230 Semiconductor package including a semiconductor device, and method of manufacturing the same
12/29/2005US20050285229 Semiconductor device and method of manufacturing the same
12/29/2005US20050285227 Semiconductor device
12/29/2005US20050285226 Parallel capacitor of semiconductor device
12/29/2005US20050285225 Semiconductor constructions comprising cerium oxide and titanium oxide
12/29/2005US20050285224 Semiconductor device and manufacturing method thereof
12/29/2005US20050285220 Packaging of electronic chips with air-bridge structures
12/29/2005US20050285219 Nonvolatile semiconductor memory and method of fabricating the same
12/29/2005US20050285217 Semiconductor device and method for manufacturing the same
12/29/2005US20050285216 Etching process for micromachining materials and devices fabricated thereby
12/29/2005US20050285214 Integrated circuit chip that supports through-chip electromagnetic communication
12/29/2005US20050285213 Reducing the dielectric constant of a portion of a gate dielectric
12/29/2005US20050285212 Transistors with increased mobility in the channel zone and method of fabrication
12/29/2005US20050285211 Gate dielectric having a flat nitrogen profile and method of manufacture therefor
12/29/2005US20050285210 Semiconductor integrated circuit device
12/29/2005US20050285209 Semiconductor memory device
12/29/2005US20050285208 Metal gate electrode for semiconductor devices
12/29/2005US20050285207 Nonvolatile semiconductor memory device having strap region and fabricating method thereof
12/29/2005US20050285206 Semiconductor device and manufacturing method thereof
12/29/2005US20050285205 Semiconductor device
12/29/2005US20050285204 Semiconductor device including a multi-channel fin field effect transistor and method of fabricating the same
12/29/2005US20050285203 Semiconductor device, method of manufacturing the same, and method of evaluating semiconductor device
12/29/2005US20050285202 Structure and method to improve sram stability without increasing cell area or off current
12/29/2005US20050285201 Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry
12/29/2005US20050285199 Method for producing a semiconductor circuit, and corresponding semiconductor circuit
12/29/2005US20050285197 Thin film transistor and method of fabricating the same
12/29/2005US20050285196 Thin film transistor of liquid crystal display device and fabrication method thereof
12/29/2005US20050285195 Thin film transistor array substrate and fabricating method thereof
12/29/2005US20050285194 Semiconductor-on-insulating (SOI) field effect transistors with body contacts and methods of forming same
12/29/2005US20050285193 Semiconductor device and method of manufacturing same
12/29/2005US20050285192 Structures and methods for manufacturing p-type mosfet withgraded embedded silicon-germanium source-drain and/or extension
12/29/2005US20050285191 Semiconductor device and method of fabricating the same
12/29/2005US20050285189 Graded conductive structure for use in a metal-oxide-semiconductor device
12/29/2005US20050285186 Semiconductor device and method of fabricating the same
12/29/2005US20050285185 NROM memory device with a high-permittivity gate dielectric formed by the low temperature oxidation of metals
12/29/2005US20050285183 Scalable two-transistor memory devices having metal source/drain regions and methods of fabricating the same
12/29/2005US20050285182 Memory cell, memory cell arrangement and method for the production of a memory cell
12/29/2005US20050285181 Non-volatil semiconductor memory device and writing method thereof
12/29/2005US20050285180 Nonvolatile semiconductor memory device and method of manufacturing the same
12/29/2005US20050285179 Isolation trenches for memory devices
12/29/2005US20050285178 Formation of memory cells and select gates of NAND memory arrays
12/29/2005US20050285177 Vertical memory cell and manufacturing method thereof
12/29/2005US20050285176 Semiconductor device having box-shaped cylindrical storage nodes and fabrication method thereof
12/29/2005US20050285175 Vertical SOI Device
12/29/2005US20050285174 Stacked semiconductor memory device
12/29/2005US20050285173 Semiconductor device and method for fabricating the same
12/29/2005US20050285172 Methods of forming vias in multilayer substrates
12/29/2005US20050285171 Ferroelectric material and ferroelectric memory device made therefrom
12/29/2005US20050285170 Semiconductor device and method for fabricating the same
12/29/2005US20050285167 Photodiode with self-aligned implants for high quantum efficiency and method of formation
12/29/2005US20050285163 Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry
12/29/2005US20050285162 Semiconductor devices having a stacked structure and methods of forming the same
12/29/2005US20050285161 Method of fabricating multi-gate transistor and multi-gate transistor fabricated thereby
12/29/2005US20050285160 Methods for forming semiconductor wires and resulting devices
12/29/2005US20050285159 Compressive SiGe <110> growth and structure of MOSFET devices
12/29/2005US20050285157 Distributed high voltage JFET
12/29/2005US20050285155 Semiconductor device-based sensors and methods associated with the same
12/29/2005US20050285153 Transistor, memory cell array and method of manufacturing a transistor
12/29/2005US20050285152 Method for connecting an integrated circuit to a substrate and corresponding circuit arrangement
12/29/2005US20050285150 Field effect transistor, transistor arrangement and method for producing a semiconducting monocrystalline substrate and a transistor arrangement
12/29/2005US20050285149 Methods for forming semiconductor wires and resulting devices
12/29/2005US20050285148 Memory with polysilicon local interconnects
12/29/2005US20050285147 Circuit apparatus and method of manufacturing the same