| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 01/05/2006 | US20060003596 Low temperature process for polysilazane oxidation/densification |
| 01/05/2006 | US20060003595 Method of passivating oxide/compound semiconductor interface |
| 01/05/2006 | US20060003594 Molecules for langmuir-blodgett deposition of a molecular layer |
| 01/05/2006 | US20060003593 Method and apparatus for stripping photo-resist |
| 01/05/2006 | US20060003592 System and method for processing a substrate using supercritical carbon dioxide processing |
| 01/05/2006 | US20060003591 Multi-step EBR process for photoresist removal |
| 01/05/2006 | US20060003590 Process for producing a mask on a substrate |
| 01/05/2006 | US20060003589 Method for the post-etch cleaning of multi-level damascene structures having underlying copper metallization |
| 01/05/2006 | US20060003588 Flash memory cells with reduced distances between cell elements |
| 01/05/2006 | US20060003587 Grinding method for a sapphire wafer |
| 01/05/2006 | US20060003586 Nonselective unpatterned etchback to expose buried patterned features |
| 01/05/2006 | US20060003585 Method of making iron silicide and method of making photoelectric transducer |
| 01/05/2006 | US20060003584 Nickel-silicon compound forming method, semiconductor device manufacturing method, and semiconductor device |
| 01/05/2006 | US20060003583 Semiconductor structures |
| 01/05/2006 | US20060003582 Method for fabricating semiconductor device |
| 01/05/2006 | US20060003581 Atomic layer deposited tantalum containing adhesion layer |
| 01/05/2006 | US20060003580 Under bump metallurgy process on passivation opening |
| 01/05/2006 | US20060003579 Interconnects with direct metalization and conductive polymer |
| 01/05/2006 | US20060003578 Method of manufacturing a semiconductor device |
| 01/05/2006 | US20060003577 Method of manufacturing a semiconductor device |
| 01/05/2006 | US20060003576 Dual damascene trench formation to avoid low-K dielectric damage |
| 01/05/2006 | US20060003575 Method of manufacturing electronic device |
| 01/05/2006 | US20060003574 Method of forming a via contact structure using a dual damascene process |
| 01/05/2006 | US20060003573 Method to fabricate aligned dual damacene openings |
| 01/05/2006 | US20060003572 Method for improving a semiconductor device delamination resistance |
| 01/05/2006 | US20060003571 Method for forming contact hole in semiconductor device |
| 01/05/2006 | US20060003570 Method and apparatus for electroless capping with vapor drying |
| 01/05/2006 | US20060003569 Semiconductor devices with permanent polymer stencil and method for manufacturing the same |
| 01/05/2006 | US20060003568 Method for manufacturing tape wiring board |
| 01/05/2006 | US20060003567 MoSi2-SiC nanocomposite coating, and manufacturing method thereof |
| 01/05/2006 | US20060003566 Methods and apparatuses for semiconductor fabrication utilizing through-wafer interconnects |
| 01/05/2006 | US20060003565 Method and apparatus for manufacturing semiconductor device |
| 01/05/2006 | US20060003564 Wiring method |
| 01/05/2006 | US20060003562 Semiconductor-on-insulator constructions; and methods of forming semiconductor-on-insulator constructions |
| 01/05/2006 | US20060003561 Method of making a semiconductor device having a strained semiconductor layer |
| 01/05/2006 | US20060003560 Method for fabricating a shadow mask in a trench of a microelectronic or micromechanical structure |
| 01/05/2006 | US20060003559 apparatus and method for controlling diffusion |
| 01/05/2006 | US20060003558 Method for fabricating semiconductor device and semiconductor device using the same |
| 01/05/2006 | US20060003557 Atomic layer deposition metallic contacts, gates and diffusion barriers |
| 01/05/2006 | US20060003556 Method of growing semi-insulating GaN layer |
| 01/05/2006 | US20060003555 Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer |
| 01/05/2006 | US20060003554 Structure and method for manufacturing planar soi substrate with multiple orientations |
| 01/05/2006 | US20060003553 Method of separating layers of material |
| 01/05/2006 | US20060003552 Wafer dividing method |
| 01/05/2006 | US20060003551 Ultra-thin die and method of fabricating same |
| 01/05/2006 | US20060003550 Method for ultra thinning bumped wafers for flip chip |
| 01/05/2006 | US20060003549 Assemblies including semiconductor substrates of reduced thickness and support structures therefor |
| 01/05/2006 | US20060003548 Highly compliant plate for wafer bonding |
| 01/05/2006 | US20060003547 Highly compliant plate for wafer bonding |
| 01/05/2006 | US20060003546 Gap-filling for isolation |
| 01/05/2006 | US20060003545 Method of making scratch resistant coated glass article including layer(s) resistant to fluoride-based etchant(s) |
| 01/05/2006 | US20060003544 Methods of forming trench isolation regions |
| 01/05/2006 | US20060003543 Methods of forming trench isolation regions |
| 01/05/2006 | US20060003542 Method of oxidizing object to be processed and oxidation system |
| 01/05/2006 | US20060003541 Method for forming device isolation film of semiconductor device |
| 01/05/2006 | US20060003540 Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus |
| 01/05/2006 | US20060003539 Method for fabricating capacitor in semiconductor memory device |
| 01/05/2006 | US20060003538 Method of forming capacitor of semiconductor device |
| 01/05/2006 | US20060003537 Methods for forming capacitor structures |
| 01/05/2006 | US20060003536 Method for fabricating a trench capacitor with an insulation collar which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell |
| 01/05/2006 | US20060003535 Apparatus and method for controlling diffusion |
| 01/05/2006 | US20060003534 Salicide process using bi-metal layer and method of fabricating semiconductor device using the same |
| 01/05/2006 | US20060003533 Method of forming an epitaxial layer for raised drain and source regions by removing surface defects of the initial crystal surface |
| 01/05/2006 | US20060003532 Semiconductor device and method of manufacturing therefor |
| 01/05/2006 | US20060003531 Non-volatile memory and method of manufacturing floating gate |
| 01/05/2006 | US20060003530 Semiconductor memory device and method for fabricating the same |
| 01/05/2006 | US20060003529 Dielectric storage memory cell having high permittivity top dielectric and method therefor |
| 01/05/2006 | US20060003528 Flash memory with metal-insulator-metal tunneling program and erase |
| 01/05/2006 | US20060003527 Bird's beak-less or STI- less OTP EPROM |
| 01/05/2006 | US20060003526 Integrated circuit arrangement comprising a capacitor, and production method |
| 01/05/2006 | US20060003525 Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor |
| 01/05/2006 | US20060003524 Method for forming trench memory cell structures for DRAMS |
| 01/05/2006 | US20060003523 Void free, silicon filled trenches in semiconductors |
| 01/05/2006 | US20060003522 Semiconductor device substrate with embedded capacitor |
| 01/05/2006 | US20060003521 Method of and apparatus for manufacturing semiconductor device |
| 01/05/2006 | US20060003520 Method for forming semiconductor device with modified channel compressive stress |
| 01/05/2006 | US20060003519 Method for fabricating CMOS image sensor |
| 01/05/2006 | US20060003518 Method for fabricating field-effect transistor structures with gate electrodes with a metal layer |
| 01/05/2006 | US20060003517 Atomic layer deposited Zr-Sn-Ti-O films using TiI4 |
| 01/05/2006 | US20060003516 Flash memory devices on silicon carbide |
| 01/05/2006 | US20060003515 Phase-change memory device and method for manufacturing the same |
| 01/05/2006 | US20060003514 Method of forming ohmic contact to a semiconductor body |
| 01/05/2006 | US20060003513 Formation of standard voltage threshold and low voltage threshold MOSFET devices |
| 01/05/2006 | US20060003512 Methods of forming semiconductor circuitry |
| 01/05/2006 | US20060003511 Method of fabricating a semiconductor device with multiple gate oxide thicknesses |
| 01/05/2006 | US20060003510 Technique for transferring strain into a semiconductor region |
| 01/05/2006 | US20060003509 Method of forming a gate structure for a semiconductor device and method of forming a cell gate structure for a non-volatile memory device |
| 01/05/2006 | US20060003508 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device |
| 01/05/2006 | US20060003507 Integrated circuit devices including a dual gate stack structure and methods of forming the same |
| 01/05/2006 | US20060003506 Crystallization method and apparatus thereof |
| 01/05/2006 | US20060003505 Method of fabricating display device |
| 01/05/2006 | US20060003504 Method of fabricating thin film transistor using metal induced lateral crystallization by etch-stopper layer patterns |
| 01/05/2006 | US20060003503 Thin film transistor and method for fabricating the same |
| 01/05/2006 | US20060003502 Method of fabricating semiconductor device and semiconductor fabricated by the same method |
| 01/05/2006 | US20060003501 Method of fabricating semiconductor device and semiconductor fabricated by the same method |
| 01/05/2006 | US20060003500 Epitaxial siox barrier/insulation layer |
| 01/05/2006 | US20060003499 Removing a high-k gate dielectric |
| 01/05/2006 | US20060003498 Designing method for a semiconductor display device, manufacturing method for the semiconductor display device, semiconductor display device, and order receiving system for the semiconductor display device using the designing method |
| 01/05/2006 | US20060003497 Semiconductor device packages including hermetic packaging elements for at least partially encapsulating conductive elements and other package elements for protecting the portions of semiconductor devices not covered by the hermetic package elements, and packaging methods |
| 01/05/2006 | US20060003496 Modified chip attach process and apparatus |