Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2014
03/19/2014CN103650182A Resin coating device, and resin coating method
03/19/2014CN103650177A Gallium nitride compound semiconductor light emitting element and light source device using same
03/19/2014CN103650150A Thin film transistor, display panel, and method for manufacturing thin film transistor
03/19/2014CN103650149A Display panel device and method for manufacturing same
03/19/2014CN103650141A Super-junction semiconductor device
03/19/2014CN103650136A Three-dimensional integrated circuit having stabilization structure for power supply voltage, and method for manufacturing same
03/19/2014CN103650132A Wireless module
03/19/2014CN103650131A Semiconductor device
03/19/2014CN103650129A Chip stacking
03/19/2014CN103650128A Laser and plasma etch wafer dicing using physically-removable mask
03/19/2014CN103650127A Electrostatic chuck assembly
03/19/2014CN103650126A Orientation adjustment device, and orientation adjustment method
03/19/2014CN103650125A Method for evaluating wafer defects
03/19/2014CN103650124A Method of evaluating quality of wafer or single crystal ingot and method of controlling quality of single crystal ingot by using the same
03/19/2014CN103650123A Method for manufacturing electronic component and adhesive sheet used in method for manufacturing electronic component
03/19/2014CN103650122A Method and apparatus for manufacturing lead frames
03/19/2014CN103650121A Metal oxide TFT with improved source/drain contacts
03/19/2014CN103650120A Membrane structure and method for producing same
03/19/2014CN103650119A Use of spectrum to synchronize RF switching with gas switching during etch
03/19/2014CN103650118A Dynamic ion radical sieve and ion radical aperture for an inductively coupled plasma (ICP) reactor
03/19/2014CN103650117A Cleaning method, processing device, and storage medium
03/19/2014CN103650116A Substrate freeze dry apparatus and method
03/19/2014CN103650115A Laser and plasma etch wafer dicing using water-soluble die attach film
03/19/2014CN103650114A Dicing-tape-integrated adhesive sheet, semiconductor device, multilayered circuit board and electronic component
03/19/2014CN103650113A Electrochemical processor
03/19/2014CN103650112A Methods of forming a metal silicide region in an integrated circuit
03/19/2014CN103650111A Composition for forming n-type diffusion layer, method for producing n-type diffusion layer, and method for producing solar cell element
03/19/2014CN103650110A Substrate support with substrate heater and symmetric rf return
03/19/2014CN103650109A Methods and apparatus for processing substrates using model-based control
03/19/2014CN103650108A Layered semiconductor substrate and method for manufacturing it
03/19/2014CN103650107A Curable composition for imprints, patterning method and pattern
03/19/2014CN103650106A Convexo-concave microstructure transcription template
03/19/2014CN103650105A Defect mitigation structures for semiconductor devices
03/19/2014CN103650067A Method for forming conductive film, conductive film, insulation method, and insulation film
03/19/2014CN103650063A Conductive particles, conductive material and connection structure
03/19/2014CN103649838A Composition for forming fine pattern and method for forming fined pattern using same
03/19/2014CN103649835A Resist underlayer film-forming composition for EUV lithography containing condensation polymer
03/19/2014CN103649833A Pattern forming method, multi-layered resist pattern, multi-layered film for organic solvent development, resist composition, method for manufacturing electronic device, and electronic device
03/19/2014CN103649702A Method and apparatus for measuring temperature of semiconductor layer
03/19/2014CN103649385A SiC epitaxial wafer and method for producing same, and device for producing SiC epitaxial wafer
03/19/2014CN103649368A Gas-injection apparatus, atomic layer deposition apparatus, and atomic layer deposition method using the apparatus
03/19/2014CN103649367A Raw material gas supply device for semiconductor manufacturing device
03/19/2014CN103649271A Etching solution and etching process using same
03/19/2014CN103648934A Plate material conveyance device and plate material conveyance method
03/19/2014CN103648718A Polishing pad
03/19/2014CN103648717A Polishing pad
03/19/2014CN103648714A Stage device and stage control system
03/19/2014CN103647012A Chip transfer method for LED (light-emitting diode) wafer level package
03/19/2014CN103646999A Phosphorus diffusion method for improving evenness of solar battery piece
03/19/2014CN103646993A Boron diffusion technology of back-junction back-contact crystalline silicon solar cell
03/19/2014CN103646967A Groove type Schottky diode structure and preparation method thereof
03/19/2014CN103646966A Thin film transistor, array substrate, preparation method of array substrate and display apparatus
03/19/2014CN103646965A Junction field effect transistor (JFET) device and manufacturing method thereof
03/19/2014CN103646964A Double diffused metal oxide semiconductor device and manufacturing method thereof
03/19/2014CN103646963A Bipolar PNP transistor and manufacturing method thereof
03/19/2014CN103646962A Nonvolatile semiconductor memory device
03/19/2014CN103646961A Silicon-based Group III nitride thin film containing high resistance parasitic conductive layer and growth method
03/19/2014CN103646960A Dynamic RAM based on thin-film transistor and preparation method thereof
03/19/2014CN103646956A Process for packaging CCD chip with protective film
03/19/2014CN103646954A A method for manufacturing a dual stress liner and a semiconductor device containing a dual stress liner
03/19/2014CN103646953A Semiconductor device and method of manufacturing the same, and electronic apparatus
03/19/2014CN103646949A Floating gate transistor array and preparation method thereof
03/19/2014CN103646948A Two-terminal multi-channel ESD device and method thereof
03/19/2014CN103646947A A three-dimensional integrated circuit in a planar process and a method for manufacturing the same
03/19/2014CN103646939A Secondary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation bump structure and process method
03/19/2014CN103646938A Primary plating-prior-to-etching metal frame subtraction imbedded chip flip bump structure and process method
03/19/2014CN103646937A Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip bump structure and process method
03/19/2014CN103646936A Secondary plating-prior-to-etching metal frame subtraction imbedded chip flip flat pin structure and process method
03/19/2014CN103646935A Secondary plating-prior-to-etching metal frame subtraction imbedded chip flip bump structure and process method
03/19/2014CN103646934A Secondary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation flat pin structure and process method
03/19/2014CN103646933A Secondary etching-prior-to-plating metal frame subtraction imbedded chip normal-installation bump structure and process method
03/19/2014CN103646932A Primary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation bump structure and process method
03/19/2014CN103646931A Primary plating-prior-to-etching metal frame subtraction imbedded chip flip plat pin structure and process method
03/19/2014CN103646930A Secondary etching-prior-to-plating metal frame subtraction imbedded chip flip flat pin structure and process method
03/19/2014CN103646929A Primary plating-prior-to-etching metal frame subtraction imbedded chip normal-installation flat pin structure and process method
03/19/2014CN103646928A Connection structure and connection method of chip
03/19/2014CN103646924A TFT array substrate and preparation method thereof and display device
03/19/2014CN103646923A Electroplating method for wafer level substrate micro through hole
03/19/2014CN103646922A Method for forming through hole or contact hole
03/19/2014CN103646921A A method for manufacturing a dual damascene structure
03/19/2014CN103646920A A post-processing method used for W-CMP and an apparatus thereof
03/19/2014CN103646919A A method for manufacturing a dual damascene structure
03/19/2014CN103646918A A method for forming a through silicon via
03/19/2014CN103646917A A method for forming a through silicon via
03/19/2014CN103646916A A method for improving HSP PSG technology and a method for producing a pre-metal dielectric layer
03/19/2014CN103646915A A method for removing a C element in a SiCN thin film and a cyclic regeneration processing technique of a monitoring sheet containing the SiCN thin film
03/19/2014CN103646914A Ultraviolet treatment method of low-dielectric constant film
03/19/2014CN103646913A Method for improving moisture-absorption-resistance performance of ultra-low-dielectric-constant porous SiCOH film
03/19/2014CN103646912A Through-hole preferred copper-interconnection manufacturing method
03/19/2014CN103646911A Method for reducing etching damages of metal layer
03/19/2014CN103646910A Preparation method for SGOI (silicon germanium on insulator) structure
03/19/2014CN103646909A Preparation method for GOI (germanium on insulator) structure
03/19/2014CN103646908A Device isolation method using high aspect ratio process
03/19/2014CN103646907A Method for improving gate oxide breakdown voltage
03/19/2014CN103646906A Integration method for leadless ball foot surface-mounted type thick film hybrid integrated circuit
03/19/2014CN103646905A Wafer identification, rotation and positioning adsorption table
03/19/2014CN103646904A Mechanical arm
03/19/2014CN103646903A Wafer positioning and thickness measuring apparatus
03/19/2014CN103646902A Gas injection tube for optimizing semiconductor processing conditions
03/19/2014CN103646901A New type welding arm structure