Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2007
03/29/2007US20070072313 Anisotropic conductive connector and circuit device inspection method
03/29/2007US20070072312 Interconnect Connecting a Diffusion Metal Layer and a Power Plane Metal and Fabricating Method Thereof
03/29/2007US20070072311 Interconnect for a GMR Stack Layer and an Underlying Conducting Layer
03/29/2007US20070072310 Semiconductor device and method of manufacturing the same
03/29/2007US20070072109 Thick film or ultrathick film responsive chemical amplification type photosensitive resin composition
03/29/2007US20070072092 Rinse treatment method, developing treatment method and developing apparatus
03/29/2007US20070071908 high-density plasma-chemical vapor deposition of silicon dioxide films over substrates having grooves on the surfaces; concurrent deposition and sputtering by controlling gas flow rates; films having excellent gap-filling; semiconductors
03/29/2007US20070071904 Electroless copper plating solution and electroless copper plating method
03/29/2007US20070071581 Process apparatus with on-the-fly workpiece centering
03/29/2007US20070071308 Workpiece inspection apparatus, workpiece inspection method and computer-readable recording medium storing program
03/29/2007US20070071306 Inspection method and photomask
03/29/2007US20070071062 Nanocrystal structures
03/29/2007US20070071051 Method of manufacturing semiconductor optical device
03/29/2007US20070070708 Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
03/29/2007US20070070575 Substrate holding apparatus, substrate holding method, and substrate processing apparatus
03/29/2007US20070070572 Low voltage modular room ionization system
03/29/2007US20070070346 Semiconductor device and semiconductor device production system
03/29/2007US20070070339 Inspection method and inspection apparatus
03/29/2007US20070070334 Defect inspection apparatus
03/29/2007US20070070261 Thin film transistor array panel
03/29/2007US20070069746 Probing card and inspection apparatus for microstructure
03/29/2007US20070069744 Board for probe card, inspection apparatus, photo-fabrication apparatus and photo-fabrication method
03/29/2007US20070069666 Apparatus for processing an object with high position accurancy
03/29/2007US20070069401 Semiconductor device, manufacturing method thereof, liquid crystal display device, RFID tag, light emitting device, and electronic device
03/29/2007US20070069400 Alignment mark, alignment apparatus and method, exposure apparatus, and device manufacturing method
03/29/2007US20070069398 Overlay metrology mark
03/29/2007US20070069396 Semiconductor package, method of manufacturing the same, stacked semiconductor package including the same and method of manufacturing the stacked semiconductor package
03/29/2007US20070069377 Clock distribution networks and conductive lines in semiconductor integrated circuits
03/29/2007US20070069372 Packaged die on PCB with heat sink encapsulant and methods
03/29/2007US20070069371 Cavity chip package
03/29/2007US20070069364 Semiconductor device and method for manufacturing same
03/29/2007US20070069355 Package with barrier wall and method for manufacturing the same
03/29/2007US20070069354 Semiconductor sensor device with sensor chip and method for producing the same
03/29/2007US20070069350 Method and apparatus for stacking electrical components using via to provide interconnection
03/29/2007US20070069348 Dual-sided substrate integrated circuit package including a leadframe having leads with increased thickness
03/29/2007US20070069346 Integrated circuit solder bumping system
03/29/2007US20070069337 Semiconductor structure and fabricating method thereof
03/29/2007US20070069335 Bonded wafer and its manufacturing method
03/29/2007US20070069334 Thin film resistors integrated at two different metal interconnect levels of single die
03/29/2007US20070069327 Method for manufacturing an integrated semiconductor device
03/29/2007US20070069324 Semiconductor device production method and semiconductor device
03/29/2007US20070069323 Semiconductor device
03/29/2007US20070069314 Magnetoresistive Random Access Memory with Improved Layout Design and Process Thereof
03/29/2007US20070069308 LDMOS device and method for manufacturing the same
03/29/2007US20070069303 Semiconductor device and method of fabricating the same
03/29/2007US20070069302 Method of fabricating CMOS devices having a single work function gate electrode by band gap engineering and article made thereby
03/29/2007US20070069299 Thin film resistors integrated at a single metal interconnect level of die
03/29/2007US20070069295 Process to integrate fabrication of bipolar devices into a CMOS process flow
03/29/2007US20070069294 Stress engineering using dual pad nitride with selective soi device architecture
03/29/2007US20070069293 Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
03/29/2007US20070069288 Semiconductor device and method for manufacturing semiconductor device
03/29/2007US20070069287 Insulated gate transistor incorporating diode
03/29/2007US20070069285 Semiconductor device and method for fabricating the same
03/29/2007US20070069283 Method of forming bottom oxide for nitride flash memory
03/29/2007US20070069282 Semiconductor device having gate insulating layers with differing thicknesses
03/29/2007US20070069281 Ultra high density flash memory
03/29/2007US20070069280 Semiconductor device and method for fabricating the same
03/29/2007US20070069279 Semiconductor memory and method of manufacturing same
03/29/2007US20070069277 SRAM cell with asymmetrical transistors for reduced leakage
03/29/2007US20070069271 Methods for manufacturing capacitors for semiconductor devices
03/29/2007US20070069270 Top electrode in a strongly oxidizing environment
03/29/2007US20070069269 Stacked capacitor and method of fabricating same
03/29/2007US20070069268 Recessed gate transistor structure and method of forming the same
03/29/2007US20070069265 Recess transistor (TR) gate to obtain large self-aligned contact (SAC) open margin
03/29/2007US20070069262 Multi-layer interconnect with isolation layer
03/29/2007US20070069252 Insulated gate semiconductor device having a clamping element to clamp gate-emitter voltage and method of manufacturing thereof
03/29/2007US20070069247 Electro-optic displays, and components for use therein
03/29/2007US20070069242 Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device
03/29/2007US20070069241 Memory with high dielectric constant antifuses and method for using at low voltage
03/29/2007US20070069239 Electronic device containing group-III elements based nitride semiconductors
03/29/2007US20070069232 Semiconductor device with a resin-sealed optical semiconductor element
03/29/2007US20070069210 Liquid crystal display device and method for manufacturing the same
03/29/2007US20070069207 Method and system of trace pull test
03/29/2007US20070069192 Thermal switching element and method for manufacturing the same
03/29/2007US20070069176 Aqueous polishing liquid and chemical mechanical polishing method
03/29/2007US20070069038 Method of manufacturing a contactless card
03/29/2007US20070068996 Continuous mode solder jet apparatus
03/29/2007US20070068921 Heater Module for Semiconductor Manufacturing Equipment
03/29/2007US20070068901 Composition and method for enhancing pot life of hydrogen peroxide-containing CMP slurries
03/29/2007US20070068899 Apparatus for the removal of an edge polymer from a substrate and methods therefor
03/29/2007US20070068628 Vacuum processing apparatus
03/29/2007US20070068627 Electrical Open/Short Contact Alignment Structure for Active Region vs. Gate Region
03/29/2007US20070068626 Vacuum processing apparatus
03/29/2007US20070068625 Method and system for controlling radical distribution
03/29/2007US20070068623 Apparatus for the removal of a set of byproducts from a substrate edge and methods therefor
03/29/2007US20070068622 Method for establishing anisotropic conductive connection and anisotropic conductive adhesive film
03/29/2007US20070068572 Isoelectronic surfactant induced sublattice disordering in optoelectronic devices
03/29/2007US20070068570 Method for forming buried contact electrode of semiconductor device having pn junction and optoelectronic semiconductor device using the same
03/29/2007US20070068559 Method and apparatus for electronic device manufacture using shadow masks
03/29/2007US20070068504 Group encapsulated dicing chuck
03/29/2007US20070068493 Hydrogen sensor
03/29/2007US20070068456 Monitoring processing of a substrate in a processing chamber
03/29/2007US20070068450 Novel nitrogen semiconductor compound and device fabricated using the same
03/29/2007US20070068086 Organic sulfonic acid, aromatic heterocyclic ring compound such as 1,2,3,4-tetrazole, and an oxidizing agent; chemical mechanical polishing; excellent in assuring polishing speed ratio between metal wiring made of copper and barrier metal as a film for copper diffusion prevention; dishing suppression
03/29/2007DE19926601B4 Apertur in einem Halbleitermaterial sowie Herstellung der Apertur und Verwendung Aperture in a semiconductor material and forming the aperture and using
03/29/2007DE19860080B4 Mikroelektronische Struktur Microelectronic structure
03/29/2007DE19846264B4 Speicherzelleneinheit für einen nichtflüchtigen ferroelektrischen Speicher, nichtflüchtiger ferroelektrischer Speicher mit einer Vielzahl dieser Zellen, Wortleitungstreiber für denselben sowie Verfahren zur Herstellung dieser Zellen Memory cell unit for a nonvolatile ferroelectric memory, non-volatile ferroelectric memory having a plurality of these cells, word line drivers for the same, and methods for producing these cells
03/29/2007DE112005000980T5 Einzelzeilen-Verbindungsfeld-Anordnung eines integrierten Schaltungs Chips Single-line connection field configuration of an integrated circuit chips
03/29/2007DE112005000448T5 Verfahren zur Umsetzung eines Wafers Procedures for the implementation of a wafer
03/29/2007DE10338689B4 Widerstandsbauelement und Verfahren zu dessen Abgleich Resistance component and method for its adjustment
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