Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2007
04/05/2007US20070077779 Poly(organosiloxane) materials and methods for hybrid organic-inorganic dielectrics for integrated circuit applications
04/05/2007US20070077778 Method of forming low dielectric constant layer
04/05/2007US20070077777 Method of forming a silicon oxynitride film with tensile stress
04/05/2007US20070077776 Method for forming an insulating film in a semiconductor device
04/05/2007US20070077775 Deposition of TiN films in a batch reactor
04/05/2007US20070077774 Method for manufacturing a semiconductor device having a stepped contact hole
04/05/2007US20070077773 Technique for creating different mechanical strain in different cpu regions by forming an etch stop layer having differently modified intrinsic stress
04/05/2007US20070077772 Apparatus and method for manufacturing semiconductor device using plasma
04/05/2007US20070077771 Method for producing buried micro-channels and micro-device comprising such micro-channels
04/05/2007US20070077770 Etching technique to planarize a multi-layer structure
04/05/2007US20070077769 Method of removing organic contaminants from a semiconductor surface
04/05/2007US20070077768 Substrate processing method
04/05/2007US20070077767 Method of plasma etching of high-k dielectric materials
04/05/2007US20070077766 Method for fabricating image sensor
04/05/2007US20070077765 Etch stop and hard mask film property matching to enable improved replacement metal gate process
04/05/2007US20070077764 Polishing method, polishing composition and polishing composition kit
04/05/2007US20070077763 Deposition technique to planarize a multi-layer structure
04/05/2007US20070077762 Method of accelerating test of semiconductor device
04/05/2007US20070077761 Technique for forming a copper-based metallization layer including a conductive capping layer
04/05/2007US20070077760 Method and apparatus for forming nickel silicide with low defect density in fet devices
04/05/2007US20070077759 Method for forming dielectric film and method for manufacturing semiconductor device by using the same
04/05/2007US20070077758 Process for producing wiring circuit board
04/05/2007US20070077757 Method of forming metal wiring in semiconductor device
04/05/2007US20070077756 Methods of fabricating a fully silicided gate and semiconductor memory device having the same
04/05/2007US20070077755 Method of forming metal wiring in a semiconductor device
04/05/2007US20070077754 Contact spacer formation using atomic layer deposition
04/05/2007US20070077753 Fabrication of via contacts having dual silicide layers
04/05/2007US20070077752 Rework process for removing residual UV adhesive from C4 wafer surfaces
04/05/2007US20070077751 Method of restoring low-k material or porous low-k layer
04/05/2007US20070077750 Atomic layer deposition processes for ruthenium materials
04/05/2007US20070077749 Method for forming a tungsten interconnect structure with enhanced sidewall coverage of the barrier layer
04/05/2007US20070077748 Method for forming a semiconductor product and semiconductor product
04/05/2007US20070077747 Microelectronic package having multiple conductive paths through an opening in a support substrate
04/05/2007US20070077746 Method of manufacturing a semiconductor device including a bump forming process
04/05/2007US20070077745 Iii-nitride semiconductor fabrication
04/05/2007US20070077744 Epitaxial substrate, method of making same and method of making a semiconductor chip
04/05/2007US20070077743 Multiple fin formation
04/05/2007US20070077742 Composition for forming silicon-cobalt film, silicon-cobalt film and method forming same
04/05/2007US20070077741 Technique for creating different mechanical strain by a contact etch stop layer stack with an intermediate etch stop layer
04/05/2007US20070077740 Methods of fabricating fully silicide gate and semiconductor memory device having the same
04/05/2007US20070077739 Carbon controlled fixed charge process
04/05/2007US20070077738 Fabrication of small scale matched bi-polar TVS devices having reduced parasitic losses
04/05/2007US20070077737 Plasma processing method and plasma processing apparatus
04/05/2007US20070077736 Method of manufacturing semiconductor device carrying out ion implantation before silicide process
04/05/2007US20070077735 Element of low temperature poly-silicon thin film and method of making poly-silicon thin film by direct deposition at low temperature and inductively-coupled plasma chemical vapor deposition equipment therefor
04/05/2007US20070077734 Thin buffer layers for SiGe growth on mismatched substrates
04/05/2007US20070077733 Germanium compound delivery device
04/05/2007US20070077732 Semiconductor device and a manufacturing method of the same
04/05/2007US20070077731 Processing method of wafer
04/05/2007US20070077730 Method and device for extracting an electronic chip from a silicon wafer and transporting the chip to its installation location on an electronic device
04/05/2007US20070077729 Method of fabricating a release substrate
04/05/2007US20070077728 Adhesive system for supporting thin silicon wafer
04/05/2007US20070077727 Method of forming a cavity by two-step etching and method of reducing dimension of a mems device
04/05/2007US20070077726 Semiconductor device and fabrication method therefor
04/05/2007US20070077725 Positive-Intrinsic-Negative (PIN) / Negative-Intrinsic-Positive (NIP) Diode
04/05/2007US20070077724 Etching methods and apparatus and substrate assemblies produced therewith
04/05/2007US20070077723 Method of forming shallow trench isolation in a semiconductor device
04/05/2007US20070077722 Flat-type capacitor for integrated circuit and method of manufacturing the same
04/05/2007US20070077721 Semiconductor device and manufacturing method therefor
04/05/2007US20070077720 Manufacturing method for an integrated semiconductor structure and corresponding integrated semiconductor structure
04/05/2007US20070077719 Semiconductor device manufacturing method
04/05/2007US20070077718 Process for manufacturing silicon-on-insulator substrate
04/05/2007US20070077717 Method for forming transistor of semiconductor device
04/05/2007US20070077716 Method and structure for second spacer formation for strained silicon MOS transistors
04/05/2007US20070077715 Semiconductor device and method of fabricating the same
04/05/2007US20070077714 Method for fabricating a semiconductor device
04/05/2007US20070077713 Semiconductor device having recessed gate electrode and method of fabricating the same
04/05/2007US20070077712 Methods of fabricating non-volatile memory devices including nanocrystals
04/05/2007US20070077711 Fabricating method of an non-volatile memory
04/05/2007US20070077710 Method for manufacturing flash memory device
04/05/2007US20070077709 Semiconductor device having self-aligned contact hole and method of fabricating the same
04/05/2007US20070077708 Technique for creating different mechanical strain by forming a contact etch stop layer stack having differently modified intrinsic stress
04/05/2007US20070077707 Non volatile memory device and method of manufacturing the same
04/05/2007US20070077706 Method of making a multi-bit nov-volatile memory (NYM) cell and structure
04/05/2007US20070077705 Split gate memory cell and method therefor
04/05/2007US20070077704 Method of fabricating a bottle-shaped trench
04/05/2007US20070077703 Semiconductor devices having improved gate insulating layers and related methods of fabricating such devices
04/05/2007US20070077702 Trench memory cell and method for making the same
04/05/2007US20070077701 Method of forming a gate stack containing a gate dielectric layer having reduced metal content
04/05/2007US20070077700 Capacitance process using passivation film scheme
04/05/2007US20070077699 Multilevel programming of phase change memory cells
04/05/2007US20070077698 Method for fabricating dual-metal gate device
04/05/2007US20070077697 Semiconductor device with semi-insulating substrate portions and method for forming the same
04/05/2007US20070077696 Laser irradiation method and laser irradiation apparatus
04/05/2007US20070077695 Semiconductor device and manufacturing method thereof
04/05/2007US20070077694 Three-dimensional integrated circuit structure
04/05/2007US20070077693 Method of fabricating fin field effect transistor using isotropic etching technique
04/05/2007US20070077692 Liquid crystal display device and fabricating method thereof
04/05/2007US20070077691 Manufacturing method of semiconductor device
04/05/2007US20070077690 Semiconductor device with transistors and fabricating method therefor
04/05/2007US20070077689 Complimentary lateral III-nitride transistors
04/05/2007US20070077688 Method for manufacturing flexible printed circuit boards
04/05/2007US20070077687 Method of producing circuit carriers with integrated passive components
04/05/2007US20070077686 Packaging method for preventing chips from being interfered and package structure thereof
04/05/2007US20070077685 Production method of semiconductor chip
04/05/2007US20070077684 Resistance welded solder crimp for joining stranded wire to a copper lead-frame
04/05/2007US20070077680 Preparation of self-assembled silicon nanotubes by hydrothermal method
04/05/2007US20070077679 Method for production of a film
04/05/2007US20070077678 Method of fabricating image sensors
04/05/2007US20070077677 Microelectronic packages and methods therefor
1 ... 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 ... 6590