Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2007
05/17/2007US20070111530 Method for etching an object to be processed
05/17/2007US20070111529 Plasma etching method
05/17/2007US20070111528 Method of cleaning semiconductor substrate conductive layer surface
05/17/2007US20070111527 Method For Producing And Cleaning Surface-Mountable Bases With External Contacts
05/17/2007US20070111526 Semiconductor processing methods of patterning materials
05/17/2007US20070111525 Method for converting electrical components
05/17/2007US20070111524 Semiconductor device and method of fabricating same
05/17/2007US20070111523 Process for conditioning conductive surfaces after electropolishing
05/17/2007US20070111522 Formation of metal silicide layer over copper interconnect for reliability enhancement
05/17/2007US20070111521 Surface preparation prior to deposition on germanium
05/17/2007US20070111520 Chemical sensor using chemically induced electron-hole production at a schottky barrier
05/17/2007US20070111519 Integrated electroless deposition system
05/17/2007US20070111518 Method and structure for sample preparation for scanning electron microscopes in integrated circuit manufacturing
05/17/2007US20070111517 Chemical mechanical polishing process
05/17/2007US20070111516 Semiconductor Assembly Having Substrate with Electroplated Contact Pads
05/17/2007US20070111515 Metal line stacking structure in semiconductor device and formation method thereof
05/17/2007US20070111514 Dual damascene process utilizing teos-based silicon oxide cap layer having reduced carbon content
05/17/2007US20070111513 Method of fabricating opening and plug
05/17/2007US20070111512 Semiconductor integrated circuit device and a method of manufacturing the same
05/17/2007US20070111511 Fabrication method of a semiconductor device
05/17/2007US20070111510 Dual damascene multi-level metallization
05/17/2007US20070111509 Polycarbosilane buried etch stops in interconnect structures
05/17/2007US20070111508 Process for producing semiconductor integrated circuit device
05/17/2007US20070111507 Active matrix substrate, manufacturing method thereof, electro-optical device, and electronic apparatus
05/17/2007US20070111506 Integrated circuit devices including metal-insulator-metal capacitors and methods of fabricating the same
05/17/2007US20070111505 Method of manufacturing a semiconductor device
05/17/2007US20070111504 Semiconductor device and manufacturing method thereof
05/17/2007US20070111503 Self-aligning nanowires and methods thereof
05/17/2007US20070111502 Damascene patterning of barrier layer metal for c4 solder bumps
05/17/2007US20070111501 Processing method for semiconductor structure
05/17/2007US20070111500 Method and apparatus for attaching solder balls to substrate
05/17/2007US20070111499 Wafer redistribution structure with metallic pillar and method for fabricating the same
05/17/2007US20070111498 Method of fabricating n-type semiconductor diamond, and semiconductor diamond
05/17/2007US20070111497 Process for forming a redundant structure
05/17/2007US20070111496 Semiconductor device having dual stacked MIM capacitor and method of fabricating the same
05/17/2007US20070111495 Contact hole structure of semiconductor device and method of forming the same
05/17/2007US20070111494 Handling of flexible planar material
05/17/2007US20070111493 Nanowires comprising metal nanodots and method for producing the same
05/17/2007US20070111492 Structured, electrically-formed floating gate for flash memories
05/17/2007US20070111491 Process for electroplating metal layer without plating lines after the solder mask process
05/17/2007US20070111490 Mask blank, mask blank manufacturing method, transfer mask manufacturing method, and semiconductor device manufacturing method
05/17/2007US20070111489 Methods of producing a semiconductor body and of producing a semiconductor device
05/17/2007US20070111488 Fabrication of nonpolar indium gallium nitride thin films, heterostructures and devices by metalorganic chemical vapor deposition
05/17/2007US20070111487 Highly integrated semiconductor device and method of fabricating the same
05/17/2007US20070111486 Metal-free silicon-molecule-nanotube testbed and memory device
05/17/2007US20070111485 Method to reduce seedlayer topography in bicmos process
05/17/2007US20070111484 Dicing sheet frame
05/17/2007US20070111483 Bonding method of semiconductor substrate and sheet, and manufacturing method of semiconductor chips using the same
05/17/2007US20070111482 Method for dicing glass substrate
05/17/2007US20070111481 Wafer and wafer cutting and dividing method
05/17/2007US20070111480 Wafer product and processing method therefor
05/17/2007US20070111479 High-power-laser chip-fabrication apparatus and method thereof
05/17/2007US20070111478 Semiconductor device and dicing method for semiconductor substrate
05/17/2007US20070111477 Semiconductor wafer
05/17/2007US20070111476 Separating device for separating semiconductor substrate and method for separating the same
05/17/2007US20070111475 Method for the structured application of a laminatable film to a substrate for a semiconductor module
05/17/2007US20070111474 Treating a SiGe layer for selective etching
05/17/2007US20070111473 Process for preparing a bonding type semiconductor substrate
05/17/2007US20070111472 Method of performing a double-sided process
05/17/2007US20070111471 Bonding method, device produced by this method, and bonding device
05/17/2007US20070111470 Trench insulation structures and methods
05/17/2007US20070111469 Method for fabricating semiconductor device with bulb-shaped recess gate
05/17/2007US20070111468 Method for fabricating dislocation-free stressed thin films
05/17/2007US20070111467 Method for forming trench using hard mask with high selectivity and isolation method for semiconductor device using the same
05/17/2007US20070111466 Reducing damage to ulk dielectric during cross-linked polymer removal
05/17/2007US20070111465 Mask, mask blank, and methods of producing these
05/17/2007US20070111464 Optical Isolator Device, and Method of Making Same
05/17/2007US20070111463 STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER
05/17/2007US20070111462 Method of manufacturing a capacitor and method of manufacturing a semiconductor device using the same
05/17/2007US20070111461 Systems And Methods For Forming Integrated Circuit Components Having Matching Geometries
05/17/2007US20070111460 Capacitor with carbon nanotubes
05/17/2007US20070111459 Manufacturing method for semiconductor device
05/17/2007US20070111458 Methods and apparatus for incorporating nitrogen in oxide films
05/17/2007US20070111457 Method of fabricating a lateral double-diffused mosfet (ldmos) transistor and a conventional cmos transistor
05/17/2007US20070111456 Power semiconductor device and method of fabricating the same
05/17/2007US20070111455 Fabrication of local damascene finFETs using contact type nitride damascene mask
05/17/2007US20070111454 Gate electrode for a semiconductor fin device
05/17/2007US20070111453 Semiconductor device with dual gates and method of manufacturing the same
05/17/2007US20070111452 fabricating method of cmos and mos device
05/17/2007US20070111451 Flash memory device and method of manufacturing the same
05/17/2007US20070111450 Semiconductor device fabrication method and electronic device fabrication method
05/17/2007US20070111449 Non-volatile memory cell and method for manufacturing the same
05/17/2007US20070111448 Semiconductor devices and methods of manufacture thereof
05/17/2007US20070111447 Process for manufacturing a floating gate non-volatile memory cell, and memory cell thus obtained
05/17/2007US20070111446 Low temperature process and structures for polycide power mosfet with ultra-shallow source
05/17/2007US20070111445 Flash memories and methods of fabricating the same
05/17/2007US20070111444 Method of manufacturing split gate type nonvolatile memory device
05/17/2007US20070111443 Memory transistor and methods
05/17/2007US20070111442 Method of making a multi-bit nanocrystal memory
05/17/2007US20070111441 Nonvolatile memory device and method of manufacturing the same
05/17/2007US20070111440 Phase changeable memory cell array region and method of forming the same
05/17/2007US20070111439 Fin field effect transistors including epitaxial fins
05/17/2007US20070111438 Self-aligned metal electrode to eliminate native oxide effect for metal insulator semiconductor (mis) capacitor
05/17/2007US20070111437 Semiconductor device including storage node and method of manufacturing the same
05/17/2007US20070111436 Method of manufacturing sidewall spacers on a memory device, and device comprising same
05/17/2007US20070111435 Schottky barrier finfet device and fabrication method thereof
05/17/2007US20070111434 Method for manufacturing capacitor
05/17/2007US20070111433 Methods for manufacturing semiconductor devices
05/17/2007US20070111432 Semiconductor device having capacitor and method of fabricating the same
05/17/2007US20070111431 MIM capacitor and associated production method