Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2007
09/18/2007US7271106 Critical dimension control for integrated circuits
09/18/2007US7271105 Method for making a micro-fluid ejection device
09/18/2007US7271104 Method for dry etching fluid feed slots in a silicon substrate
09/18/2007US7271103 Surface treated low-k dielectric as diffusion barrier for copper metallization
09/18/2007US7271102 Method of etching uniform silicon layer
09/18/2007US7271101 High density plasma chemical vapor deposition process
09/18/2007US7271100 Slurry composition, polishing method using the slurry composition and method of forming a gate pattern using the slurry composition
09/18/2007US7271099 Forming a conductive pattern on a substrate
09/18/2007US7271098 Method of fabricating a desired pattern of electronically functional material
09/18/2007US7271097 Method for manufacturing a semiconductor protection element and a semiconductor device
09/18/2007US7271096 Method for improved deposition of dielectric material
09/18/2007US7271095 Process for producing metallic interconnects and contact surfaces on electronic components
09/18/2007US7271094 Multiple shadow mask structure for deposition shadow mask protection and method of making and using same
09/18/2007US7271093 Low-carbon-doped silicon oxide film and damascene structure using same
09/18/2007US7271092 Boron incorporated diffusion barrier material
09/18/2007US7271091 Method for forming metal pattern to reduce contact resistivity with interconnection contact
09/18/2007US7271090 Guard ring of a combination wafer or singulated die
09/18/2007US7271089 Barrier layer, IC via, and IC line forming methods
09/18/2007US7271088 Slurry composition with high planarity and CMP process of dielectric film using the same
09/18/2007US7271087 Dual damascene interconnection in semiconductor device and method for forming the same
09/18/2007US7271086 Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces
09/18/2007US7271085 Method of fabricating a semiconductor interconnect structure
09/18/2007US7271084 Reinforced solder bump structure and method for forming a reinforced solder bump
09/18/2007US7271082 Method of manufacturing a semiconductor device
09/18/2007US7271080 Electrically erasable programmable read only memory (EEPROM) cells and methods of fabricating the same
09/18/2007US7271079 Method of doping a gate electrode of a field effect transistor
09/18/2007US7271078 Method for fabricating semiconductor device and semiconductor device using the same
09/18/2007US7271077 Deposition methods with time spaced and time abutting precursor pulses
09/18/2007US7271076 Manufacturing method of thin film integrated circuit device and manufacturing method of non-contact type thin film integrated circuit device
09/18/2007US7271075 Method and a device for bonding two plate-shaped objects
09/18/2007US7271074 Trench insulation in substrate disks comprising logic semiconductors and power semiconductors
09/18/2007US7271073 Marker for alignment of non-transparent gate layer, method for manufacturing such a marker, and use of such a marker in a lithographic apparatus
09/18/2007US7271072 Stud electrode and process for making same
09/18/2007US7271071 Method of forming a catalytic surface comprising at least one of Pt, Pd, Co and Au in at least one of elemental and alloy forms
09/18/2007US7271070 Method for producing transistors
09/18/2007US7271069 Semiconductor device having a plurality of different layers and method therefor
09/18/2007US7271068 Method of manufacture of semiconductor device
09/18/2007US7271067 Voltage sustaining layer with opposite-doped islands for semiconductor power devices
09/18/2007US7271066 Semiconductor device and a method of manufacturing the same
09/18/2007US7271065 Horizontal memory devices with vertical gates
09/18/2007US7271064 Method of forming a field effect transistor using conductive masking material
09/18/2007US7271063 Method of forming FLASH cell array having reduced word line pitch
09/18/2007US7271062 Non-volatile memory cell and fabricating method thereof and method of fabricating non-volatile memory
09/18/2007US7271061 Method of fabricating non-volatile memory
09/18/2007US7271060 Semiconductor processing methods
09/18/2007US7271059 Semiconductor device and method of fabricating the same
09/18/2007US7271058 Storage capacitor and method of manufacturing a storage capacitor
09/18/2007US7271057 Memory array with overlapping buried digit line and active area and method for forming same
09/18/2007US7271056 Method of fabricating a trench capacitor DRAM device
09/18/2007US7271055 Methods of forming low leakage currents metal-insulator-metal (MIM) capacitors and related MIM capacitors
09/18/2007US7271054 Method of manufacturing a ferroelectric capacitor having RU1-XOX electrode
09/18/2007US7271053 Methods of forming capacitors and electronic devices
09/18/2007US7271052 Long retention time single transistor vertical memory gain cell
09/18/2007US7271051 Methods of forming a plurality of capacitor devices
09/18/2007US7271050 Silicon nanocrystal capacitor and process for forming same
09/18/2007US7271049 Method of forming self-aligned low-k gate cap
09/18/2007US7271048 Method for manufacturing trench MOSFET
09/18/2007US7271047 Test structure and method for measuring the resistance of line-end vias
09/18/2007US7271046 Method of making a semiconductor device in which a bipolar transistor and a metal silicide layer are formed on a substrate
09/18/2007US7271045 Etch stop and hard mask film property matching to enable improved replacement metal gate process
09/18/2007US7271044 CMOS (complementary metal oxide semiconductor) technology
09/18/2007US7271043 Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
09/18/2007US7271042 Laser annealing method and laser annealing device
09/18/2007US7271041 Method for manufacturing thin film transistor
09/18/2007US7271040 Electrode contact section of semiconductor device
09/18/2007US7271039 Method for manufacturing radiofrequency identification device using transfer paper and radiofrequency identification device produced using this method
09/18/2007US7271038 Methods of forming ruthenium film by changing process conditions during chemical vapor deposition and ruthenium films formed thereby
09/18/2007US7271037 Leadframe alteration to direct compound flow into package
09/18/2007US7271036 Leadframe alteration to direct compound flow into package
09/18/2007US7271035 Manufacturing method for resin sealed semiconductor device
09/18/2007US7271034 Semiconductor device with a high thermal dissipation efficiency
09/18/2007US7271033 Method for fabricating chip package
09/18/2007US7271032 Leadless plastic chip carrier with etch back pad singulation
09/18/2007US7271031 Universal interconnect die
09/18/2007US7271030 Direct bumping on integrated circuit contacts enabled by metal-to-insulator adhesion
09/18/2007US7271029 Method of forming a package-ready light-sensitive integrated circuit
09/18/2007US7271028 High density electronic interconnection
09/18/2007US7271027 Castellation wafer level packaging of integrated circuit chips
09/18/2007US7271026 Method for producing chip stacks and chip stacks formed by integrated devices
09/18/2007US7271025 Image sensor with SOI substrate
09/18/2007US7271024 Method for fabricating sensor semiconductor device
09/18/2007US7271023 Floating body germanium phototransistor
09/18/2007US7271022 Process for forming microstructures
09/18/2007US7271021 Light-emitting device with a current blocking structure and method for making the same
09/18/2007US7271020 Light emitting diode covered with a reflective layer and method for fabricating the same
09/18/2007US7271019 Lateral heat spreading layers for epi-side up ridge waveguide semiconductor lasers
09/18/2007US7271018 Method of forming a support frame for semiconductor packages
09/18/2007US7271017 Organic electroluminescent display device and fabricating method thereof
09/18/2007US7271015 Manufacturing method of semiconductor integrated circuit device and probe card
09/18/2007US7271014 Fabrication method of semiconductor integrated circuit device including inspecting using probe card
09/18/2007US7271013 Semiconductor device having a bond pad and method therefor
09/18/2007US7271012 Failure analysis methods and systems
09/18/2007US7271011 Methods of implementing magnetic tunnel junction current sensors
09/18/2007US7271010 Nonvolatile magnetic memory device and manufacturing method thereof
09/18/2007US7270941 Method of passivating silicon-oxide based low-k materials using a supercritical carbon dioxide passivating solution comprising a silylating agent is disclosed. The silylating agent is preferably an organosilicon compound comprising
09/18/2007US7270940 Method of structuring of a substrate
09/18/2007US7270937 Over-coating composition for photoresist and process for forming photoresist pattern using the same
09/18/2007US7270936 Negative resist composition comprising hydroxy-substituted base polymer and Si-containing crosslinker having epoxy ring and a method for patterning semiconductor devices using the same
09/18/2007US7270935 Cyanoadamantyl compounds and polymers and photoresists comprising same
09/18/2007US7270933 applying mixtures of curing agents, light absorbers, acid generators, solvents and polydimethylsiloxane on the surfaces of a layer to be etched, then baking to form films, applying photosensitive materials, exposing to a light source and developing to form patterns
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