Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2007
12/21/2007WO2007145433A1 Semiconductor device and touch sensor device
12/21/2007WO2007145407A1 Method of manufacturing silicon nanowires using silicon nanodot thin film
12/21/2007WO2007145335A1 Magnetic head, solid-state element memory and magnetic sensor
12/21/2007WO2007145315A1 Substrate processing system and substrate conveyance method
12/21/2007WO2007145314A1 Substrate processing system and substrate transfer method
12/21/2007WO2007145307A1 Semiconductor integrated circuit device
12/21/2007WO2007145303A1 Semiconductor module and method for manufacturing same
12/21/2007WO2007145300A1 Gallium nitride compound semiconductor light emitting element
12/21/2007WO2007145292A1 Method for forming thin film
12/21/2007WO2007145279A1 Normally-off field effect transistor using iii nitride semiconductor and method for manufacturing such transistor
12/21/2007WO2007145265A1 Method and system for bringing in/out of substrate, and photosensitive laminate manufacturing apparatus
12/21/2007WO2007145249A1 Positive photosensitive resin composition containing polymer having ring structure
12/21/2007WO2007145230A1 Shower plate, plasma processing apparatus using the same, plasma processing method, and method for manufacturing electronic device
12/21/2007WO2007145229A1 Shower plate, method for manufacturing the shower plate, plasma processing apparatus using the shower plate, plasma processing method and electronic device manufacturing method
12/21/2007WO2007145165A1 Stage apparatus, exposure apparatus and device manufacturing method
12/21/2007WO2007145139A1 Variable slit device, illuminating device, exposure device, exposure method, and method of manufacturing device
12/21/2007WO2007145132A1 Placing table structure and heat treatment apparatus
12/21/2007WO2007145086A1 Semiconductor device, signal transmitter and signal transmission method
12/21/2007WO2007145070A1 Placing table structure and heat treatment apparatus
12/21/2007WO2007145068A1 Constant voltage circuit and method of controlling output voltage of constant voltage circuit
12/21/2007WO2007145066A1 Method for producing solid phase sheet and solar cell utilizing solid phase sheet
12/21/2007WO2007145063A1 Solid-phase sheet growing substrate and solid-phase sheet manufacturing method
12/21/2007WO2007145038A1 Proximity aligner and proximity exposure method
12/21/2007WO2007145031A1 Method for driving semiconductor device, and semiconductor device
12/21/2007WO2007145025A1 Optical element and optical device
12/21/2007WO2007144982A1 Sticking and holding apparatus and sticking and holding method
12/21/2007WO2007144828A1 Semiconductor device and method of manufacturing such a device
12/21/2007WO2007144807A2 Double gate transistor and method of manufacturing same
12/21/2007WO2007144514A1 Method and apparatus for optically characterizing the doping of a substrate
12/21/2007WO2007144416A1 Mos-power transistors with edge termination with small area requirement
12/21/2007WO2007144278A1 Apparatus for feeding a wire in a wire bonder, comprising a plurality of channels subjected to compressed air and lying on the arc of a circle
12/21/2007WO2007144053A2 Semiconductor device with a trench isolation and method of manufacturing trenches in a semiconductor body
12/21/2007WO2007144026A1 Electroless nip adhesion and/or capping layer for copper interconnexion layer
12/21/2007WO2007143852A1 Matrix electronic devices using opaque substrates and fabrication method therefor
12/21/2007WO2007127074A3 Semiconductor on glass insulator made using improved thinning process
12/21/2007WO2007122083B1 Dynamic memory cell structures
12/21/2007WO2007121343A3 Methods of making flash memory cell arrays having dual control gates per memory cell charge storage element
12/21/2007WO2007112153A3 Metal gate with zirconium
12/21/2007WO2007111771A3 Method of forming field effect transistors and methods of forming integrated circuity comprising a transistor gate array and circuity peripheral to the gate array
12/21/2007WO2007106780A3 Dielectric components and method of manufacture
12/21/2007WO2007106647A3 Silicided nonvolatile memory and method of making same
12/21/2007WO2007095173A3 White light emitting devices
12/21/2007WO2007094853A3 Method and system for selectively etching a dielectric material relative to silicon
12/21/2007WO2007094759A3 Semiconductor package with plated connection
12/21/2007WO2007087354A3 Cleaving wafers from silicon crystals
12/21/2007WO2007084907A3 Method for fabricating last level copper-to-c4 connection with interfacial cap structure
12/21/2007WO2007076189A3 Rotary chip attach
12/21/2007WO2007070467A3 Substrate having minimum kerf width
12/21/2007WO2007056602A3 Bonding metals and non-metals using inductive heating
12/21/2007WO2007053269A3 Method and system for forming a nitrided germanium-containing layer using plasma processing
12/21/2007WO2007024607A3 Multi-axis pick and place assembly
12/21/2007WO2007021540A3 Etch features with reduced line edge roughness
12/21/2007WO2007001856A3 Substrate contact for a capped mems and method of making the substrate contact at the wafer level
12/21/2007WO2006076082A3 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
12/21/2007WO2006068672A3 Semiconductor die positioning system and a method of bonding a semiconductor die to a substrate
12/21/2007WO2006031411A3 A conductive lithographic polymer mixture and method of making devices using same
12/21/2007WO2006023595A3 Moving vacuum chamber stage with air bearing and differentially pumped grooves
12/21/2007WO2006019761A3 Mems device and interposer and method for integrating mems device and interposer
12/21/2007WO2005053373A3 Chip scale package and method of assembling the same
12/21/2007WO2004036620A3 Method for generating oxide layers on semiconductor substrates
12/21/2007CA2682360A1 Matrix electronic devices using opaque substrates and fabrication method therefor
12/20/2007US20070294058 Substrate Processing System Managing Apparatus Information of Substrate Processing Apparatus
12/20/2007US20070293974 Substrate Processing System Managing Apparatus Information of Substrate Processing Apparatus
12/20/2007US20070293970 Substrate processing apparatus and carrier adjusting system
12/20/2007US20070293386 Crystallized glass, and method for producing crystallized glass
12/20/2007US20070293209 Systems for Remotely Maintaining Inventory
12/20/2007US20070293129 Substrate Holding Device And Polishing Apparatus
12/20/2007US20070293058 Method of Laser Annealing Using Two Wavelengths of Radiation
12/20/2007US20070293057 Method of direct coulomb explosion in laser ablation of semiconductor structures
12/20/2007US20070293056 Surface Modification Method for Solid Sample, Impurity Activation Method, and Method for Manufacturing Semiconductor Device
12/20/2007US20070293055 Method for self-limiting deposition of one or more monolayers
12/20/2007US20070293054 Etching, cleaning and drying methods using supercritical fluid and chamber systems using these methods
12/20/2007US20070293053 Method For Manufacturing Probe Structure of Probe Card
12/20/2007US20070293052 Apparatus and method for optical interference fringe based integrated circuit processing
12/20/2007US20070293051 Method for manufacturing a semiconductor device including a silicon film
12/20/2007US20070293050 Reduction of feature critical dimensions
12/20/2007US20070293049 Slurry for CMP of Cu film, polishing method and method for manufacturing semiconductor device
12/20/2007US20070293048 Polishing slurry
12/20/2007US20070293047 Polishing method and method for fabricating semiconductor device
12/20/2007US20070293046 Method for forming metal wiring of semiconductor device and a semiconductor device manufactured by the same
12/20/2007US20070293045 Semiconductor device and method for fabricating the same
12/20/2007US20070293044 Patterning 3d features in a substrate
12/20/2007US20070293043 Edge gas injection for critical dimension uniformity improvement
12/20/2007US20070293042 Semiconductor die with protective layer and related method of processing a semiconductor wafer
12/20/2007US20070293041 Sub-lithographic feature patterning using self-aligned self-assembly polymers
12/20/2007US20070293040 Filling deep features with conductors in semiconductor manufacturing
12/20/2007US20070293039 Combined copper plating method to improve gap fill
12/20/2007US20070293038 Method of manufacturing multilayer wiring substrate, and multilayer wiring substrate
12/20/2007US20070293037 Top layers of metal for high performance IC's
12/20/2007US20070293036 Top layers of metal for high performance IC's
12/20/2007US20070293035 Interlayer insulating layer and method of manufacturing the same
12/20/2007US20070293034 Unlanded via process without plasma damage
12/20/2007US20070293033 Microelectronic assembly with back side metallization and method for forming the same
12/20/2007US20070293032 Semiconductor manufacturing apparatus and semiconductor device manufacturing method
12/20/2007US20070293031 SPLIT POLY-SiGe/POLY-Si ALLOY GATE STACK
12/20/2007US20070293030 Semiconductor device having silicide thin film and method of forming the same
12/20/2007US20070293029 Method for fabricating semiconductor device
12/20/2007US20070293028 Method of forming low forward voltage Shottky barrier diode with LOCOS structure therein
12/20/2007US20070293027 Dopant diffusion method and method of manufacturing semiconductor device
12/20/2007US20070293026 Method of manufacturing semiconductor device