Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2007
12/25/2007US7312127 Semiconductor wafer having a metal silicate dielectric layer with a dopant having dissociable oxygen, particularly CaO or SrO; enhanced electrical properties; CMOS gates, memory cells, and capacitors
12/25/2007US7312126 Process for producing a layer arrangement, and layer arrangement for use as a dual gate field-effect transistor
12/25/2007US7312125 Fully depleted strained semiconductor on insulator transistor and method of making the same
12/25/2007US7312124 Method of manufacturing a semiconductor device
12/25/2007US7312123 Semiconductor device and a method of manufacturing the same
12/25/2007US7312122 Self-aligned element isolation film structure in a flash cell and forming method thereof
12/25/2007US7312121 Method of manufacturing a semiconductor memory device
12/25/2007US7312120 Method for obtaining extreme selectivity of metal nitrides and metal oxides
12/25/2007US7312119 Stacked capacitor and method of fabricating same
12/25/2007US7312118 Semiconductor device and method of manufacturing the same
12/25/2007US7312117 Semiconductor device and method of manufacturing the same
12/25/2007US7312116 Method for forming a MIM capacitor in a semiconductor device
12/25/2007US7312115 Fabrication method for a semiconductor structure having integrated capacitors
12/25/2007US7312114 Manufacturing method for a trench capacitor having an isolation collar electrically connected with a substrate on a single side via a buried contact for use in a semiconductor memory cell
12/25/2007US7312113 Method of forming source/drain region of semiconductor device
12/25/2007US7312112 Transistor array substrate fabrication for an LCD
12/25/2007US7312110 Methods of fabricating semiconductor devices having thin film transistors
12/25/2007US7312109 Methods for fabricating fuse programmable three dimensional integrated circuits
12/25/2007US7312108 Method for assembling a ball grid array package with two substrates
12/25/2007US7312107 Semiconductor device and manufacturing method thereof
12/25/2007US7312106 Method for encapsulating a chip having a sensitive surface
12/25/2007US7312105 Leadframe of a leadless flip-chip package and method for manufacturing the same
12/25/2007US7312104 Comprises epoxy resin, curing agent, and inorganic composite oxide particles (silicon dioxide and group III/IV oxide); formed via stripping sheet on bump-mounting wafer
12/25/2007US7312103 Method for making an integrated circuit substrate having laser-embedded conductive patterns
12/25/2007US7312102 Bridge connection type of chip package and fabricating method thereof
12/25/2007US7312101 Packaged microelectronic devices and methods for packaging microelectronic devices
12/25/2007US7312099 Organic electroluminescent device and fabricating method thereof
12/25/2007US7312098 CMOS image sensor and method of manufacturing the same
12/25/2007US7312097 Method of fabricating an optical concentrator for a photovoltaic solar cell
12/25/2007US7312096 Nanotube semiconductor structures with varying electrical properties
12/25/2007US7312095 Modification of selectivity for sensing for nanostructure sensing device arrays
12/25/2007US7312094 Printing system and method for fabricating a liquid crystal display device
12/25/2007US7312093 Image sensor capable of adjusting focusing length for individual color and fabrication method thereof
12/25/2007US7312092 Methods for fabrication of localized membranes on single crystal substrate surfaces
12/25/2007US7312091 Methods for forming a ferroelectric layer and capacitor and FRAM using the same
12/25/2007US7312019 Periodic stair-like structure; mask pattern position is shifted and the first resist pattern is formed such that the trench in the target region is completely filled with the first resist pattern even when an error in positioning occurs
12/25/2007US7312018 Film forming method, film forming apparatus, pattern forming method, and manufacturing method of semiconductor apparatus
12/25/2007US7312017 Method for burying resist and method for manufacturing semiconductor device
12/25/2007US7312016 Chemically amplified positive resist composition and patterning process
12/25/2007US7312003 Computer data signal embodied in electromagnetic waveform; manufacturing small dimension features of integrated circuit complex layouts; reduced phase conflicts
12/25/2007US7311972 comprising borosilicate glass particle fillers, hardeners, accelerators, and ternary epoxy mixture consisting of bisphenol-A epoxy resins, cyclo-aliphatic epoxy resins and triglycidyl isocyanurate resins, used for encapsulation of optoelectronic device or optical components
12/25/2007US7311947 Laser assisted material deposition
12/25/2007US7311946 Carbiding, nitriding or metallization; vapor deposition of carbides, carbonitrides, nitrides or metal silicon nitrides or carbides from organometallic compounds in presence of adhesion promoter; forming copper film
12/25/2007US7311942 Using a compound to as scavenger for halogen compound
12/25/2007US7311888 Annealed wafer and method for manufacturing the same
12/25/2007US7311881 Chips, and apparatus and method for reaction analysis
12/25/2007US7311862 Phase separation to form interpenetrating polymer network comprising a continuous polymer-rich phase interspersed with a continuous polymer-depleted phase; binodal or spinodal decomposition; solidifying polymer-rich phase; evaporating or solvent stripping polymer-depleted phase
12/25/2007US7311857 Etching composition, method of preparing the same, method of etching an oxide film, and method of manufacturing a semiconductor device
12/25/2007US7311856 Chemical-mechanical polishing of a polishing pad,and/or abrasive; surfactant with an azole group of 1,2,3-triazole, 1,2,4-triazole, pyrazole, imidazole, indazole, tetrazole, benzimidazole, and/or benzotriazole having a polymer chain attached; not polyvinylimidazole; and liquid carrier
12/25/2007US7311855 Cerium oxide, acetylene compound, and water; flattening dielectrics; semiconductors
12/25/2007US7311852 Method of plasma etching low-k dielectric materials
12/25/2007US7311851 Apparatus and method for reactive atom plasma processing for material deposition
12/25/2007US7311850 Method of forming patterned thin film and method of fabricating micro device
12/25/2007US7311847 System and method for point-of-use filtration and purification of fluids used in substrate processing
12/25/2007US7311811 Device providing electrical contact to the surface of a semiconductor workpiece during processing
12/25/2007US7311810 Two position anneal chamber
12/25/2007US7311809 Plating apparatus for substrate
12/25/2007US7311797 Productivity enhancing thermal sprayed yttria-containing coating for plasma reactor
12/25/2007US7311796 Plasma processing apparatus
12/25/2007US7311784 Plasma processing device
12/25/2007US7311783 Multiple axis tumbler coating apparatus
12/25/2007US7311782 Apparatus for active temperature control of susceptors
12/25/2007US7311779 Heating apparatus to heat wafers using water and plate with turbolators
12/25/2007US7311776 Localized synthesis and self-assembly of nanostructures
12/25/2007US7311775 Method for heat-treating silicon wafer and silicon wafer
12/25/2007US7311771 Method and apparatus for forming crystalline portions of semiconductor film
12/25/2007US7311738 Positioning apparatus
12/25/2007US7311586 Apparatus and method for chemical-mechanical polishing (CMP) head having direct pneumatic wafer polishing pressure
12/25/2007US7311520 Heat treatment apparatus
12/25/2007US7311488 System and method for conveying flat panel display
12/25/2007US7311451 Method of manufacturing optical communication module, and optimum mold and lead frame for use in the manufacturing method
12/25/2007US7311407 Mirror unit, method of producing the same, and exposure apparatus and method using the mirror unit
12/25/2007US7311242 Design of an insulated cavity
12/25/2007US7311140 Heat sink assembly with overmolded carbon matrix
12/25/2007US7311109 Method for cleaning a processing chamber and method for manufacturing a semiconductor device
12/25/2007US7311008 Semiconductor structure comprising a stress sensitive element and method of measuring a stress in a semiconductor structure
12/21/2007WO2007147084A2 Generalized clock tree synthesis
12/21/2007WO2007147075A2 Patterning 3d features in a substrate
12/21/2007WO2007146964A2 Thin-film devices fromed from solid particles
12/21/2007WO2007146859A1 Integrated transistor devices
12/21/2007WO2007146848A2 Surface modification of interlayer dielectric for minimizing contamination and surface degradation
12/21/2007WO2007146777A2 Method of manufacturing gate sidewalls that avoids recessing
12/21/2007WO2007146775A2 Stacked chips with underpinning
12/21/2007WO2007146757A2 Methods of forming solder connections and structure thereof
12/21/2007WO2007146728A1 Method, apparatus, and system for thin die thin thermal interface material in integrated circuit packages
12/21/2007WO2007146643A2 Multi-level load lock chamber, transfer chamber, and robot suitable for interfacing with same
12/21/2007WO2007146521A1 Bonding method with flowable adhesive composition
12/21/2007WO2007146478A1 Microelectronic assembly with back side metallization and method for forming the same
12/21/2007WO2007146379A2 Trench drain with sloping rails
12/21/2007WO2007146181A2 A method of operating a multi-terminal electronic device
12/21/2007WO2007146036A1 Method of forming elevated photosensor and resulting structure
12/21/2007WO2007145873A2 Growth of low dislocation density group-iii nitrides and related thin-film structures
12/21/2007WO2007145758A2 Selective epitaxial formation of semiconductor films
12/21/2007WO2007145695A1 Low contact resistance cmos circuits and methods for their fabrication
12/21/2007WO2007145679A2 Planarization of gan by photoresist technique using an inductively coupled plasma
12/21/2007WO2007145630A1 Glass flux assisted sintering of chemical solution deposited thin dielectric films
12/21/2007WO2007145599A1 Integrated circuit package system with offset stacked die
12/21/2007WO2007145522A1 Varied pitch connection device and method
12/21/2007WO2007145517A1 Geometry of functional layers in rollable devices
12/21/2007WO2007145505A1 Method for manufacturing a device for supporting a substrate during the manufacture of semiconductor components, as well as such a device
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