Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2008
03/13/2008WO2008029595A1 Temperature measuring device
03/13/2008WO2008029589A1 Method and equipment for producing group-iii nitride
03/13/2008WO2008029582A1 Semiconductor device, method for manufacturing the semiconductor device, and display device
03/13/2008WO2008029579A1 Silicon single-crystal wafer and process for producing the same
03/13/2008WO2008029557A1 Board storage container and check valve
03/13/2008WO2008029544A1 Semiconductor device, method for fabricating the same and electronic device
03/13/2008WO2008029538A1 Polishing pad
03/13/2008WO2008029537A1 Method for production of polishing pad
03/13/2008WO2008029361A1 Integrated circuit and use thereof
03/13/2008WO2008029360A1 Manufacturing a contact structure in a semiconductor device
03/13/2008WO2008029334A1 Fabrication of self-assembled nanowire-type interconnects on a semiconductor device
03/13/2008WO2008029176A1 Method of pumping gas
03/13/2008WO2008028940A1 Low resistance contact structure and fabrication thereof
03/13/2008WO2008028906A1 Method and device for controlling the generation of ultrasonic wire bonds
03/13/2008WO2008028851A1 Control of carbon nanostructure growth in an interconnect structure
03/13/2008WO2008028850A1 CuSiN/SiN DIFFUSION BARRIER FOR COPPER IN INTEGRATED-CIRCUIT DEVICES
03/13/2008WO2008028660A2 Device with pb-based high-k dielectric thin-film capacitor comprising pb-donating layers
03/13/2008WO2008028452A1 Plasma etching method for producing positive etching profiles in silicon substrates
03/13/2008WO2008028352A1 An apparatus of controlling temperature and a method of controlling the temperature of wafer
03/13/2008WO2008016514A3 Nand memory with silicon-rich charge storage layers and manufacturing method thereof using self-aligned shallow-trench isolation
03/13/2008WO2008014506A3 Dual inductor circuit for multi-band wireless communication device
03/13/2008WO2008011688A3 GROWTH OF MONOCRYSTALLINE GeN ON A SUBSTRATE
03/13/2008WO2008011687A3 Conductive contacts on ge
03/13/2008WO2008007326A3 Transponder and method of producing a transponder
03/13/2008WO2008005716A3 Wafer platform
03/13/2008WO2008005630A3 Methods for minimizing mask undercuts and notches for plasma processing system
03/13/2008WO2007142817A3 Memory system with switch element
03/13/2008WO2007137946A3 Trench widening without merging
03/13/2008WO2007130333A3 Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistors
03/13/2008WO2007121735A3 Composite substrate, and method for the production of a composite substrate
03/13/2008WO2007120228A3 Carbon nanotubes solder composite for high performance interconnect
03/13/2008WO2007111779A8 Method of integrating peald ta-containing films into cu metallization
03/13/2008WO2007108925A3 Oxidation-stabilized cmp compositions and methods
03/13/2008WO2007081642A3 Flash devicewith shared word lines and manufacturing methods thereof
03/13/2008WO2007014631A3 Substrate comprising at least one entire surface or partial surface macrostructured layer, method for the production thereof and its use
03/13/2008WO2006136584A8 Method of forming a high dielectric constant film and method of forming a semiconductor device
03/13/2008US20080065340 Particle-measuring system and particle-measuring method
03/13/2008US20080064849 Adhesive film for circuit connection, and circuit connection structure
03/13/2008US20080064791 Encapsulation; reliable high temperature operation; including phenol resin, curing accelerator, silica and alumina
03/13/2008US20080064358 Semiconductor device and method for making the same
03/13/2008US20080064311 Polishing Pad
03/13/2008US20080064308 Polishing apparatus and manufacturing method of an electronic apparatus
03/13/2008US20080064302 Polishing apparatus, polishing pad, and polishing method
03/13/2008US20080064233 Circuit-connecting material and circuit terminal connected structure and connecting method
03/13/2008US20080064227 Apparatus For Chemical Vapor Deposition and Method For Cleaning Injector Included in the Apparatus
03/13/2008US20080064226 Method of processing a substrate, heating apparatus, and method of forming a pattern
03/13/2008US20080064225 Low dielectric constant film produced from silicon compounds comprising silicon-carbon bond
03/13/2008US20080064224 Device comprising an ohmic via contact, and method of fabricating thereof
03/13/2008US20080064223 Etching liquid, etching method, and method of manufacturing electronic component
03/13/2008US20080064222 Alkaline etching solution for semiconductor wafers and alkaline etching method
03/13/2008US20080064221 Method for fabricating semiconductor device including plug
03/13/2008US20080064220 Method and system for dry etching a hafnium containing material
03/13/2008US20080064219 Method of removing photoresist
03/13/2008US20080064218 Manufacturing method for preventing image sensor from undercut
03/13/2008US20080064217 Methods of Forming Semiconductor Devices Using Di-Block Polymer Layers
03/13/2008US20080064216 Method of manufacturing flash memory device
03/13/2008US20080064215 Method of fabricating a semiconductor package
03/13/2008US20080064214 Semiconductor processing including etched layer passivation using self-assembled monolayer
03/13/2008US20080064213 Method for forming a fine pattern of a semiconductor device
03/13/2008US20080064212 Method of manufacturing semiconductor device
03/13/2008US20080064211 Polishing compound for copper wirings and method for polishing surface of semiconductor integrated circuit
03/13/2008US20080064210 Systems and methods of forming refractory metal nitride layers using organic amines
03/13/2008US20080064209 Systems and methods for forming metal-containing layers using vapor deposition processes
03/13/2008US20080064208 System and method for increasing the strength of a bond made by a small diameter wire in ball bonding
03/13/2008US20080064207 Semiconductor Device Power Interconnect Striping
03/13/2008US20080064206 Method of manufacturing a semiconductor memory device
03/13/2008US20080064205 Silicon-alloy based barrier layers for integrated circuit metal interconnects
03/13/2008US20080064204 Method of forming a metal line of a semiconductor device
03/13/2008US20080064203 Method for fabricating a contact hole
03/13/2008US20080064202 Method of manufacturing a semiconductor device having an interconnect structure that increases in impurity concentration as width increases
03/13/2008US20080064201 Flip chip packaging method that protects the sensing area of an image sensor from contamination
03/13/2008US20080064200 Method to manufacture a phase change memory
03/13/2008US20080064199 Methods of Forming Electrical Interconnect Structures Using Polymer Residues to Increase Etching Selectivity Through Dielectric Layers
03/13/2008US20080064198 Chalcogenide semiconductor memory device with insulating dielectric
03/13/2008US20080064197 STRUCTURES AND METHODS FOR MANUFACTURING OF DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI MOS DEVICES BY GATE STRESS ENGINEERING WITH SiGe AND/OR Si:C
03/13/2008US20080064196 Semiconductor device and method of manufacturing same
03/13/2008US20080064195 Method for Manufacturing Gate of Non Volatile Memory Device
03/13/2008US20080064194 Method for fabricating flash memory device
03/13/2008US20080064193 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING KrF LIGHT SOURCE
03/13/2008US20080064192 Method for forming semiconductor device
03/13/2008US20080064191 Modulation of Stress in Stress Film through Ion Implantation and Its Application in Stress Memorization Technique
03/13/2008US20080064190 Manufacturing method of semiconductor device and semiconductor manufacturing device
03/13/2008US20080064189 Crack stop for low k dielectrics
03/13/2008US20080064188 Wafer processing method and wafer processing apparatus
03/13/2008US20080064187 Production Method for Stacked Device
03/13/2008US20080064186 Manufacturing method of semiconductor element
03/13/2008US20080064185 Semiconductor wafer front side protection
03/13/2008US20080064184 Method, apparatus for holding and treatment of a substrate
03/13/2008US20080064183 Method of forming a multi-layer semiconductor structure incorporating a processing handle member
03/13/2008US20080064182 Process for high temperature layer transfer
03/13/2008US20080064181 Semiconductor device and method of fabricating the same
03/13/2008US20080064180 Method for passivating inductively coupled surface currents in a semiconductor device
03/13/2008US20080064179 Low leakage mim capacitor
03/13/2008US20080064178 Deep trench capacitor through soi substrate and methods of forming
03/13/2008US20080064177 Bipolar Device Having Improved Capacitance
03/13/2008US20080064176 Method of removing a spacer, method of manufacturing a metal-oxide-semiconductor transistor device, and metal-oxide-semiconductor transistor device
03/13/2008US20080064175 Low Stress Sacrificial Cap Layer
03/13/2008US20080064174 Method for manufacturing an integrated circuit with fully depleted and partially depleted transistors
03/13/2008US20080064173 Semiconductor device, cmos device and fabricating methods of the same
03/13/2008US20080064172 Stressed semiconductor device structures having granular semiconductor material