| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 05/01/2014 | US20140120293 Electrostatic discharge compatible dicing tape with laser scribe capability |
| 05/01/2014 | US20140119858 Semiconductor Device Manufacturing Line |
| 05/01/2014 | US20140119857 Automated Material Handling System for Semiconductor Manufacturing Based on a Combination of Vertical Carousels and Overhead Hoists |
| 05/01/2014 | US20140119856 Substrate transport apparatus with active edge gripper |
| 05/01/2014 | US20140118880 Performance enhancement of coating packaged esc for semiconductor apparatus |
| 05/01/2014 | US20140118711 Exposure Device for the Structured Exposure of a Surface |
| 05/01/2014 | US20140118059 Through-substrate via shielding |
| 05/01/2014 | US20140118055 Igbt die structure with auxiliary p well terminal |
| 05/01/2014 | US20140117953 Method and apparatus for a tunable driver circuit |
| 05/01/2014 | US20140117563 Photoactive Compound Gradient Photoresist |
| 05/01/2014 | US20140117561 Etch damage and esl free dual damascene metal interconnect |
| 05/01/2014 | US20140117560 Semiconductor Structures and Methods of Manufacturing the Same |
| 05/01/2014 | US20140117559 Process and material for preventing deleterious expansion of high aspect ratio copper filled through silicon vias (tsvs) |
| 05/01/2014 | US20140117558 Self-enclosed asymmetric interconnect structures |
| 05/01/2014 | US20140117557 Package substrate and method of forming the same |
| 05/01/2014 | US20140117556 Through silicon via stacked structure and a method of manufacturing the same |
| 05/01/2014 | US20140117555 Integrated Circuit Underfill Scheme |
| 05/01/2014 | US20140117554 Packaged integrated circuit having large solder pads and method for forming |
| 05/01/2014 | US20140117553 Packaging substrate, method for manufacturing same, and chip packaging body having same |
| 05/01/2014 | US20140117551 Processing system for forming film on target object |
| 05/01/2014 | US20140117550 Semiconductor device including an insulating layer, and method of forming the semiconductor device |
| 05/01/2014 | US20140117549 Method of manufacturing semiconductor device, and semiconductor device |
| 05/01/2014 | US20140117548 Semiconductor device and method of manufacturing the same |
| 05/01/2014 | US20140117547 Barrier layer for copper interconnect |
| 05/01/2014 | US20140117546 Hybrid bonding mechanisms for semiconductor wafers |
| 05/01/2014 | US20140117545 Copper hillock prevention with hydrogen plasma treatment in a dedicated chamber |
| 05/01/2014 | US20140117538 Package structure and fabrication method thereof |
| 05/01/2014 | US20140117537 Semiconductor package and method of fabricating the same |
| 05/01/2014 | US20140117535 Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip |
| 05/01/2014 | US20140117534 Interconnection Structure |
| 05/01/2014 | US20140117533 Semiconductor Devices, Methods of Manufacture Thereof, and Packaged Semiconductor Devices |
| 05/01/2014 | US20140117532 Bump Interconnection Ratio for Robust CPI Window |
| 05/01/2014 | US20140117531 Semiconductor device with encapsulant |
| 05/01/2014 | US20140117530 Semiconductor Devices and Methods for Manufacturing Semiconductor Devices |
| 05/01/2014 | US20140117529 Semiconductor Constructions, Patterning Methods, and Methods of Forming Electrically Conductive Lines |
| 05/01/2014 | US20140117525 Power module package and method of manufacturing the same |
| 05/01/2014 | US20140117523 Stacked dual-chip packaging structure and preparation method thereof |
| 05/01/2014 | US20140117521 Semiconductor device with thermal dissipation lead frame |
| 05/01/2014 | US20140117512 Surface profile for semiconductor region |
| 05/01/2014 | US20140117511 Passivation Layer and Method of Making a Passivation Layer |
| 05/01/2014 | US20140117510 Semiconductor Bonding Structure and Process |
| 05/01/2014 | US20140117509 Metal Deposition with Reduced Stress |
| 05/01/2014 | US20140117507 Double trench well formation in sram cells |
| 05/01/2014 | US20140117505 Chip Having Backside Metal and Method for Manufacturing Same |
| 05/01/2014 | US20140117504 Ephemeral bonding |
| 05/01/2014 | US20140117503 Ephemeral bonding |
| 05/01/2014 | US20140117502 Method for processing a semiconductor carrier, a semiconductor chip arrangement and a method for manufacturing a semiconductor device |
| 05/01/2014 | US20140117497 Decoupling Capacitors For Integrated Circuits |
| 05/01/2014 | US20140117493 Isolation scheme for bipolar transistors in bicmos technology |
| 05/01/2014 | US20140117490 Semiconductor device including esd protection device |
| 05/01/2014 | US20140117489 Sub-second annealing lithography techniques |
| 05/01/2014 | US20140117488 Pattern decomposition lithography techniques |
| 05/01/2014 | US20140117473 Packages and methods for packaging |
| 05/01/2014 | US20140117469 Tsv-mems combination |
| 05/01/2014 | US20140117468 Methods and integrated circuit package for sensing fluid properties |
| 05/01/2014 | US20140117467 Metal-Oxide-Semiconductor Field-Effect Transistor with Spacer over Gate |
| 05/01/2014 | US20140117466 Replacement gate electrode with multi-thickness conductive metallic nitride layers |
| 05/01/2014 | US20140117462 Bulk finfet with punchthrough stopper region and method of fabrication |
| 05/01/2014 | US20140117461 Connecting Through Vias to Devices |
| 05/01/2014 | US20140117456 Semiconductor Device and Fabrication Method Thereof |
| 05/01/2014 | US20140117455 Multigate field effect transistor and process thereof |
| 05/01/2014 | US20140117454 FinFET with Dummy Gate on Non-Recessed Shallow Trench Isolation (STI) |
| 05/01/2014 | US20140117446 LDMOS Device with Minority Carrier Shunt Region |
| 05/01/2014 | US20140117444 Lateral MOSFET |
| 05/01/2014 | US20140117443 Double diffused metal oxide semiconductor device and manufacturing method thereof |
| 05/01/2014 | US20140117442 Semiconductor structure |
| 05/01/2014 | US20140117437 Super Junction Semiconductor Device Comprising a Cell Area and an Edge Area |
| 05/01/2014 | US20140117436 Semiconductor device and method for fabricating the same |
| 05/01/2014 | US20140117434 Nonvolatile semiconductor memory device and method for manufacturing same |
| 05/01/2014 | US20140117426 Semiconductor device and method for fabricating the same |
| 05/01/2014 | US20140117425 Interlayer dielectric for non-planar transistors |
| 05/01/2014 | US20140117422 Fin field effect transistors having a nitride containing spacer to reduce lateral growth of epitaxially deposited semiconductor materials |
| 05/01/2014 | US20140117421 Self-aligned contact structure for replacement metal gate |
| 05/01/2014 | US20140117420 Semiconductor structure incorporating a contact sidewall spacer with a self-aligned airgap and a method of forming the semiconductor structure |
| 05/01/2014 | US20140117419 Fin etch and fin replacement for finfet integration |
| 05/01/2014 | US20140117418 Three-dimensional silicon-based transistor comprising a high-mobility channel formed by non-masked epitaxy |
| 05/01/2014 | US20140117417 Performance enhancement in transistors by providing a graded embedded strain-inducing semiconductor region with adapted angles with respect to the substrate surface |
| 05/01/2014 | US20140117415 Junction field effect transistors and associated fabrication methods |
| 05/01/2014 | US20140117414 Semiconductor device having a triple gate transistor and method for manufacturing the same |
| 05/01/2014 | US20140117413 Pads and pin-outs in three dimensional integrated circuits |
| 05/01/2014 | US20140117409 Method and structure for body contacted fet with reduced body resistance and source to drain contact leakage |
| 05/01/2014 | US20140117407 Power semiconductor device and method of manufacturing the same |
| 05/01/2014 | US20140117406 Reverse blocking mos semiconductor device and manufacturing method thereof |
| 05/01/2014 | US20140117382 Epitaxial Wafer, Method for Fabricating the Wafer, and Semiconductor Device Including the Wafer |
| 05/01/2014 | US20140117381 Epitaxial Wafer, Method for Fabricating the Same, and Semiconductor Device Including the Same |
| 05/01/2014 | US20140117380 Flat sic semiconductor substrate |
| 05/01/2014 | US20140117379 Semiconductor device and method of manufacturing the same |
| 05/01/2014 | US20140117364 Semiconductor Device and Manufacturing Method Thereof |
| 05/01/2014 | US20140117356 Semiconductor structure for improved oxide fill in |
| 05/01/2014 | US20140117349 Semiconductor device and manufacturing method of semiconductor device using metal oxide |
| 05/01/2014 | US20140117345 Optoelectronic component and method for the production thereof |
| 05/01/2014 | US20140117308 Electronic Device Containing Nanowire(s), Equipped with a Transition Metal Buffer Layer, Process for Growing at Least One Nanowire, and Process for Manufacturing a Device |
| 05/01/2014 | US20140117301 Wrap around phase change memory |
| 05/01/2014 | US20140117235 Standard wafer and its fabrication method |
| 05/01/2014 | US20140117119 Member for semiconductor manufacturing apparatus and method for manufacturing the same |
| 05/01/2014 | US20140117098 Method for Manufacturing a Data Carrier |
| 05/01/2014 | US20140117005 Diffusion furnace |
| 05/01/2014 | US20140116920 Reticle Pod |
| 05/01/2014 | US20140116623 Etching treatment apparatus |
| 05/01/2014 | US20140116480 Substrate processing apparatus and substrate processing method |