Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2014
05/01/2014WO2014064860A1 Substrate processing apparatus
05/01/2014WO2014064823A1 Method for producing semiconductor film, solar cell, and chalcopyrite compound
05/01/2014WO2014064822A1 Power semiconductor module, and power conversion device provided with same
05/01/2014WO2014064779A1 Plasma treatment device and method
05/01/2014WO2014064774A1 Substrate storage container
05/01/2014WO2014064769A1 Solar cell
05/01/2014WO2014064737A1 Accumulation-mode mosfet
05/01/2014WO2014064663A1 Thin film deposition method by zero space transfer
05/01/2014WO2014064606A1 Production of micro-mechanical devices
05/01/2014WO2014064395A1 Optoelectronic device and method for manufacturing same
05/01/2014WO2014064220A1 Method for producing a semi-conductive structure
05/01/2014WO2014064153A2 Method for the metallization of blind vias
05/01/2014WO2014064050A1 Treatment of preforms containing copper with a mixture containing chlorine-free and carboxyl-free acids and oxidants
05/01/2014WO2014063404A1 Semiconductor structure and manufacturing method thereof
05/01/2014WO2014063403A1 Quasi nanowire transistor and manufacturing method thereof
05/01/2014WO2014063402A1 Method for manufacturing fin field effect transistor
05/01/2014WO2014063397A1 Protection ring structure of high-voltage device and manufacturing method therefor
05/01/2014WO2014063381A1 Method of manufacturing mosfet
05/01/2014WO2014063380A1 Manufacturing method of mosfet
05/01/2014WO2014063379A1 Manufacturing method of mosfet
05/01/2014WO2014063287A1 Wire tail connector for a semiconductor device
05/01/2014WO2014063281A1 Semiconductor device including stacked bumps for emi/rfi shielding
05/01/2014WO2014026205A3 Apparatus and method for control of print gap
05/01/2014WO2014016544A3 A process for the electrochemical deposition of a semiconductor material
05/01/2014WO2013184921A3 Reduced stress tsv and interposer structures
05/01/2014US20140121831 Transfer unit, method for controlling the transfer unit, and apparatus and method for treating substrate using the transfer unit
05/01/2014US20140121814 Substrate processing apparatus
05/01/2014US20140120808 Dressing method, method of determining dressing conditions, program for determining dressing conditions, and polishing apparatus
05/01/2014US20140120739 Compositions of low-k dielectric sols containing nonmetallic catalysts
05/01/2014US20140120738 Method of depositing thin film
05/01/2014US20140120737 Sub-saturated atomic layer deposition and conformal film deposition
05/01/2014US20140120736 Method for fabrication of crack-free ceramic dielectric films
05/01/2014US20140120735 Semiconductor process gas flow control apparatus
05/01/2014US20140120734 Novel Etching Composition
05/01/2014US20140120733 Low damage photoresist strip method for low-k dielectrics
05/01/2014US20140120732 Plasma processing method and plasma processing apparatus
05/01/2014US20140120731 Icp source design for plasma uniformity and efficiency enhancement
05/01/2014US20140120730 Thin film forming composition for lithography containing titanium and silicon
05/01/2014US20140120729 Method for removing a patterned hard mask layer
05/01/2014US20140120728 Highly selective spacer etch process with reduced sidewall spacer slimming
05/01/2014US20140120727 Method of tungsten etching
05/01/2014US20140120726 Method of patterning a low-k dielectric film
05/01/2014US20140120725 Polishing apparatus and polishing method
05/01/2014US20140120724 Composite conditioner and associated methods
05/01/2014US20140120723 Methods for depositing fluorine/carbon-free conformal tungsten
05/01/2014US20140120722 Process for filling vias in the microelectronics
05/01/2014US20140120721 Method of manufacturing an electronic component
05/01/2014US20140120720 Method of protecting sidewall surfaces of a semiconductor device
05/01/2014US20140120719 Method of manufacturing a semiconductor device
05/01/2014US20140120718 Method of fabricating semiconductor device
05/01/2014US20140120717 Method of Semiconductor Integrated Circuit Fabrication
05/01/2014US20140120716 Semiconductor device manufacturing method
05/01/2014US20140120715 Semiconductor manufacturing method, semiconductor structure and package structure thereof
05/01/2014US20140120714 Carbon nanotube devices with unzipped low-resistance contacts
05/01/2014US20140120713 Method of making a logic transistor and a non-volatile memory (nvm) cell
05/01/2014US20140120712 Nmos metal gate materials, manufacturing methods, and equipment using cvd and ald processes with metal based precursors
05/01/2014US20140120711 Method of forming metal gate
05/01/2014US20140120710 Semiconductor device with buried gate and method for fabricating the same
05/01/2014US20140120709 Insulative cap for borderless self-aligning contact in semiconductor device
05/01/2014US20140120708 Method of manufacturing semiconductor devices including replacement metal gate process incorporating a conductive dummy gate layer
05/01/2014US20140120707 Method to Improve Reliability of High-k Metal Gate Stacks
05/01/2014US20140120706 Method of forming interlayer dielectric film above metal gate of semiconductor device
05/01/2014US20140120705 Inorganic phosphate containing doping compositions
05/01/2014US20140120704 Method for crystallizing a silicon substrate
05/01/2014US20140120703 Method for manufacturing nitride semiconductor device
05/01/2014US20140120702 Method for manufacturing a semiconductor structure and semiconductor component comprising such a structure
05/01/2014US20140120701 Dual gate finfet devices
05/01/2014US20140120700 Plasma treatment of film for impurity removal
05/01/2014US20140120699 Fabrication method for dicing of semiconductor wafers using laser cutting techniques
05/01/2014US20140120698 Wafer dicing using hybrid multi-step laser scribing process with plasma etch
05/01/2014US20140120697 Wafer dicing using femtosecond-based laser and plasma etch
05/01/2014US20140120696 In-street die-to-die interconnects
05/01/2014US20140120695 Method for manufacturing bonded substrate having an insulator layer in part of bonded substrate
05/01/2014US20140120694 Use of plate oxide layers to increase bulk oxide thickness in semiconductor devices
05/01/2014US20140120693 Method of making a shallow trench isolation (sti) structures
05/01/2014US20140120692 Air Gap Isolation In Non-Volatile Memory
05/01/2014US20140120691 Method of thin silicon deposition for enhancement of on current and surface characteristics of semiconductor device
05/01/2014US20140120687 Self-Aligned Silicide Bottom Plate for EDRAM Applications by Self-Diffusing Metal in CVD/ALD Metal Process
05/01/2014US20140120680 Methods of fabricating semiconductor devices
05/01/2014US20140120679 Double diffused metal oxide semiconductor device and manufacturing method thereof
05/01/2014US20140120677 Methods of forming enhanced mobility channel regions on 3d semiconductor devices, and devices comprising same
05/01/2014US20140120676 Double diffused metal oxide semiconductor device and manufacturing method thereof
05/01/2014US20140120675 Carbon and nitrogen doping for selected pmos transistors on an integrated circuit
05/01/2014US20140120674 Method for 1/f noise reduction in nmos devices
05/01/2014US20140120673 Integrated circuit having field effect transistors and manufacturing method
05/01/2014US20140120669 Method of manufacturing vertical planar power mosfet and method of manufacturing trench-gate power mosfet
05/01/2014US20140120668 Structure and method for metal gate stack oxygen concentration control using an oxygen diffusion barrier layer and a sacrificial oxygen gettering layer
05/01/2014US20140120667 Beol structures incorporating active devices and mechanical strength
05/01/2014US20140120666 Back-end transistors with highly doped low-temperature contacts
05/01/2014US20140120662 Semiconductor device and method of manufacturing the same
05/01/2014US20140120660 Semiconductor device and method for manufacturing the same
05/01/2014US20140120658 Method of fabricating array substrate
05/01/2014US20140120657 Back Channel Etching Oxide Thin Film Transistor Process Architecture
05/01/2014US20140120654 Method of manufacturing bonded substrate, bonded substrate, method of manufacturing solid-state imaging apparatus, solid-state imaging apparatus, and camera
05/01/2014US20140120648 Composition for forming n-type diffusion layer, method of forming n-type diffusion layer, and method of producing photovoltaic cell
05/01/2014US20140120644 Method for Producing Organic Light-Emitting Diode Illuminating Device
05/01/2014US20140120638 Apparatus and method for removing defect
05/01/2014US20140120637 Process for Growing at Least One Nanowire Using a Transition Metal Nitride Layer Obtained in Two Steps
05/01/2014US20140120636 Substrate processing apparatus, method of manufacturing semiconductor device, and thermocouple support
05/01/2014US20140120635 Etching method and substrate processing apparatus
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