Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2008
06/05/2008WO2008019377A3 Method of separating semiconductor dies
06/05/2008WO2008016487A3 Memory cell system with multiple nitride layers
06/05/2008WO2008012098A3 Silane-free plasma-assisted cvd deposition of silicon nitride as an antireflective film and for hydrogen passivation of photocells constructed on silicon wafers
06/05/2008WO2008008516A3 Forward scattering nanoparticle enhancement method and photo detector device
06/05/2008WO2007149788A3 Method to increase silicon nitride tensile stress using nitrogen plasma in-situ treatment and ex-situ uv cure
06/05/2008WO2007024300A3 Magnetic devices and techniques for formation thereof
06/05/2008WO2006118673A3 Method of forming shallow trench isolation structures in the logic and memory areas
06/05/2008WO2004077514A3 Clocktree tuning shims and shim tuning method
06/05/2008US20080134131 Simulation model making method
06/05/2008US20080133163 Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing
06/05/2008US20080133042 Exposure apparatus
06/05/2008US20080133032 System and method for on-line diagnostics
06/05/2008US20080132156 Polishing composition and polishing method
06/05/2008US20080132153 Cmp conditioner
06/05/2008US20080132089 Methods for discretized processing and process sequence integration of regions of a substrate
06/05/2008US20080132088 Method for surface modification
06/05/2008US20080132087 Post-deposition treatment to enhance properties of si-o-c low k films
06/05/2008US20080132086 Reducing nitrogen concentration with in-situ steam generation
06/05/2008US20080132085 Silicon Rich Dielectric Antireflective Coating
06/05/2008US20080132084 Method for manufacturing semiconductor device background
06/05/2008US20080132083 Film formation apparatus for semiconductor process and method for using the same
06/05/2008US20080132082 Precision printing electroplating through plating mask on a solar cell substrate
06/05/2008US20080132081 Thin III-V semiconductor films with high electron mobility
06/05/2008US20080132080 Method of avoiding haze formation on surfaces of silicon-containing PECVD-deposited thin films
06/05/2008US20080132079 Film formation apparatus and method for using the same
06/05/2008US20080132078 Ashing Method And Ashing Apparatus
06/05/2008US20080132077 Method for manufacturing a fin field effect transistor
06/05/2008US20080132076 Method for avoiding polysilicon defect
06/05/2008US20080132075 Method of manufacturing semiconductor memory device
06/05/2008US20080132074 Method for fabricating semiconductor device with recess gate
06/05/2008US20080132073 Oxide Pattern Forming Method and Patterning Method of Semiconductor Device
06/05/2008US20080132072 Semiconductor substrate having a protection layer at the substrate back side
06/05/2008US20080132071 Composition and method for enhancing pot life of hydrogen peroxide-containing CMP slurries
06/05/2008US20080132070 Fully and uniformly silicided gate structure and method for forming same
06/05/2008US20080132069 Apparatus and method for forming a thin layer on semiconductor substrates
06/05/2008US20080132068 Damascene metal-insulator-metal (MIM) device
06/05/2008US20080132067 Method for fabricating a dual damascene structure
06/05/2008US20080132066 Integrated Circuit Having a Top Side Wafer Contact and a Method of Manufacture Therefor
06/05/2008US20080132065 Method for redirecting void diffusion away from vias in an integrated circuit design
06/05/2008US20080132064 Method for forming a self-aligned nitrogen-containing copper silicide capping layer in a microstructure device
06/05/2008US20080132063 Fabrication method of semiconductor device
06/05/2008US20080132062 Method of manufacturing semiconductor device
06/05/2008US20080132061 Contact barrier layer deposition process
06/05/2008US20080132060 Contact barrier layer deposition process
06/05/2008US20080132059 Semiconductor integrated circuit device and fabrication method for semiconductor integrated circuit device
06/05/2008US20080132058 Electrical programmable metal resistor
06/05/2008US20080132057 Method of selectively forming a conductive barrier layer by ald
06/05/2008US20080132056 INTEGRATION OF THIN FILM RESISTORS HAVING DIFFERENT TCRs INTO SINGLE DIE
06/05/2008US20080132055 Hardmask for improved reliability of silicon based dielectrics
06/05/2008US20080132054 Method For Producing Metal/Semiconductor Contacts Through a Dielectric
06/05/2008US20080132053 Method for Preparing an Intergrated Circuits Device Having a Reinforcement Structure
06/05/2008US20080132052 coating photoresists onto substrates, then removing the photoresist using electrode patterns simulated through computer programs corresponding to virtual connection lines for connecting nanostructure wires with electrodes, depositing a metal layer and removing the remaining photoresist from the substrate
06/05/2008US20080132051 Method for fabricating semiconductor device with bulb-shaped recess gate
06/05/2008US20080132050 Deposition process for graded cobalt barrier layers
06/05/2008US20080132049 Method for fabricating schottky barrier tunnel transistor
06/05/2008US20080132048 Semiconductor component and method for producing the same
06/05/2008US20080132047 Method for doping impurities
06/05/2008US20080132046 Plasma Doping With Electronically Controllable Implant Angle
06/05/2008US20080132045 Laser-based photo-enhanced treatment of dielectric, semiconductor and conductive films
06/05/2008US20080132044 Nitride Semiconductor Device Manufacturing Method
06/05/2008US20080132043 Method of manufacturing semiconductor device
06/05/2008US20080132042 Process For Cleaning Chamber In Chemical Vapor Deposition Apparatus
06/05/2008US20080132041 Laser irradiation apparatus, laser irradiation method, and method for manufacturing a semiconductor device
06/05/2008US20080132040 Deposition Technique for Producing High Quality Compound Semiconductor Materials
06/05/2008US20080132039 Formation and treatment of epitaxial layer containing silicon and carbon
06/05/2008US20080132038 Semiconductor device and manufacturing method of the same
06/05/2008US20080132037 Device manufacturing method and dicing method
06/05/2008US20080132036 Method for subdividing wafer into LEDs
06/05/2008US20080132035 Method of processing wafer
06/05/2008US20080132034 Laser dicing sheet and manufacturing method for chip body
06/05/2008US20080132033 Method for manufacturing semiconductor device
06/05/2008US20080132032 Method for manufacturing silicon wafer
06/05/2008US20080132031 Method of manufacturing a semiconductor heterostructure
06/05/2008US20080132030 Method of manufacturing semiconductor device
06/05/2008US20080132029 Trench widening without merging
06/05/2008US20080132028 Method and Structure for Isolating Substrate Noise
06/05/2008US20080132027 Planar vertical resistor and bond pad resistor and related method
06/05/2008US20080132026 Optimum padset for wire bonding rf technologies with high-q inductors
06/05/2008US20080132025 Ultra-thin soi vertical bipolar transistors with an inversion collector on thin-buried oxide (box) for low substrate-bias operation and methods thereof
06/05/2008US20080132024 Method of manufacturing double diffused drains in semiconductor devices
06/05/2008US20080132023 Semiconductor process
06/05/2008US20080132022 Method of fabricating semiconductor device
06/05/2008US20080132021 High Performance FET Devices and Methods Thereof
06/05/2008US20080132020 Method of forming silicon nano crystals and method of manufacturing memory devices having the same
06/05/2008US20080132019 Short channel effect engineering in MOS device using epitaxially carbon-doped silicon
06/05/2008US20080132018 Formation and treatment of epitaxial layer containing silicon and carbon
06/05/2008US20080132017 Manufacturing method of non-volatile memory
06/05/2008US20080132016 Method of manufacturing a flash memory device
06/05/2008US20080132015 Sidewall memory with self-aligned asymmetrical source and drain configuration
06/05/2008US20080132014 EEPROM cell and EEPROM device with high integration and low source resistance and method of manufacturing the same
06/05/2008US20080132013 Methods of Forming Semiconductor Constructions
06/05/2008US20080132012 Advanced CMOS Using Super Steep Retrograde Wells
06/05/2008US20080132011 Semiconductor device and method of manufacturing same
06/05/2008US20080132010 Thin film transistor substrate and manufacturing method for the same
06/05/2008US20080132009 discharging a single droplet of a liquid containing conductive particles onto a coating segment enclosed by edges, to form wire patterns and performing a heat, optical or dry treatment; thin films
06/05/2008US20080132008 method for fabricating landing polysilicon contact structures for semiconductor devices
06/05/2008US20080132007 Hybrid integrated circuits and their methods of fabrication
06/05/2008US20080132006 Packaged microelectronic devices and methods for packaging microelectronic devices
06/05/2008US20080132005 Electroplating method for a semiconductor device
06/05/2008US20080132004 Method and apparatus for applying external coating to grid array packages for increased reliability and performance