Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2008
06/05/2008US20080127487 Method for placing a component on a substrate, as well as such a device
06/05/2008US20080127467 Semiconductor Manufacturing Apparatus and Manufacturing of a Semiconductor Device
06/05/2008DE19804748B4 Anordnung und Verfahren der Isolierung gegen mechanische Spannung bei der Befestigung von Halbleiterchips Arrangement and method of the insulation against mechanical stress at the mounting of semiconductor chips
06/05/2008DE112006000717T5 Chip-Scale-Packung Chip-scale package
06/05/2008DE112005003638T5 Verfahren zur Erstellung von Fotomaskenstrukturdaten, mittels der Fotomaskenstrukturdaten erstellte Fotomaske und Verfahren zur Herstellung einer Halbleitervorrichtung mittels der Fotomaske Method for creating photo mask pattern data generated by the photo mask pattern data photomask and method for manufacturing a semiconductor device using the photomask
06/05/2008DE112005003629T5 IC-Baugruppe und Verfahren zur Herstellung einer IC-Baugruppe IC package and method for manufacturing an IC module
06/05/2008DE10351014B4 Diodenstruktur und integrale Leistungsschaltanordnung mit Low-Leakage-Diode Diode structure and integral power switching device with low leakage diode
06/05/2008DE10335100B4 Verfahren zur Herstellung verkürzter Seitenwandabstandselemente für eine Polysiliziumleitung und Verfahren zur Herstellung eines Feldeffekttransistors A process for producing a shortened sidewall spacers for a polysilicon line and method of manufacturing a field effect transistor
06/05/2008DE10312662B4 Halbleitereinrichtungsherstellungsanordnung und Halbleitereinrichtungsherstellungsverfahren zum Bilden von Halbleiterchips durch Teilen von Halbleiterwafern A semiconductor device manufacturing apparatus and semiconductor device manufacturing method for forming semiconductor chips by dividing the semiconductor wafers
06/05/2008DE10227342B4 Verfahren zur Verbindung einer integrierten Schaltung mit einem Substrat und entsprechende Schaltungsanordnung A method for bonding an integrated circuit having a substrate and corresponding circuit arrangement
06/05/2008DE102007056741A1 Spannungsmodulierter Transistor Modulated voltage transistor
06/05/2008DE102007056590A1 Semiconductor device i.e. power transistor, for use as switch, has floating gate to control current flow between source and drain areas based on programmed or erased state of gate, and tunneling gate programming and/or erasing floating gate
06/05/2008DE102007056242A1 Pattern e.g. mask, writing device for use on target workpiece, has deflection plate to deflect electron beam with charged particles based on electron beam irradiation time, and aperture to block deflection of electron beam by plate
06/05/2008DE102007054866A1 Halbleitermodul und Verfahren zur Herstellung desselben Semiconductor module and method of manufacturing the same
06/05/2008DE102007040792A1 Device e.g. semiconductor circuit, manufacturing method, involves dicing devices from substrate e.g. silicon substrate, cleaning surface of volatile protective agent e.g. octamethylcyclotetrasiloxane, and evaporating protective agent
06/05/2008DE102007023666A1 Semiconductor component e.g. silicon chip, has passivation layer extended on contact distributor layer and comprising opening that is arranged on section of contact distributor layer, and connection contact arranged on opening
06/05/2008DE102006057718A1 Semiconductor component e.g. semiconductor laser diode, has relaxation layer arranged between functional layer and solder and/or between solder and carrier substrate, where relaxation layer has thickness of micrometers, and is made of gold
06/05/2008DE102006057385A1 Magnetic field sensor's measuring accuracy verifying method, involves positioning chip at field coil that is supplied with current, and adjusting current using measuring coil based on magnetic flow density based measured value
06/05/2008DE102006057075A1 Chucking surface 's shape measuring method for wafer-chuck, involves reproducing mechanical contact requirements arising in chemical mechanical polishing process between wafer-chuck, backing film, wafer, polishing pad and polishing table
06/05/2008DE102006056626A1 Conductive barrier layer producing method for manufacturing integrated circuit, involves depositing layer on exposed surfaces by self-restricted deposition technique, and providing surface with characteristics at reduced deposition rate
06/05/2008DE102006056625A1 Lithography process's focus parameter adjustment evaluating method for forming and manufacturing of microstructure unit i.e. integrated circuit, involves evaluating specified focusing adjustment based on two measuring data
06/05/2008DE102006056624A1 Forming an adjusted copper compound in the copper-containing metal surface comprises applying a precursor material on the surface, forming a semiconductor component in a first dielectric layer and activating a chemical reaction of nitrogen
06/05/2008DE102006056621A1 Substrates transporting and handling method for forming application specific integrated circuits, involves transporting substrate in transport container between two manufacturing sites, where substrate has front side and back side
06/05/2008DE102006056620A1 Semiconductor structure forming method for use in e.g. memory device, involves providing semiconductor substrate comprising layer of dielectric material, where recess is provided in layer of dielectric material
06/05/2008DE102006056598A1 Microstructure feature e.g. microprocessor manufacturing method, involves forming protection layer on back side of substrate e.g. silicon-on-insulator substrates, using silicon carbide material
06/05/2008DE102006056597A1 Tool controller for use in process tool system e.g. deposition tool, has job management unit interrupting currently processed job when one process priority for currently processed job is lower than process priority for job to be processed
06/05/2008DE102006056560A1 Parameter's e.g. reference voltage, target value determining method for e.g. dynamic RAM, involves determining target values for parameter to be trimmed for respective temperatures, where values and temperatures differ from each other
06/05/2008DE102006056361A1 Modul mit polymerhaltigem elektrischen Verbindungselement Polymer-module with electrical connection element
06/05/2008DE102006049354B3 Verfahren zur Herstellung eines Anschlusskontakts auf einem Halbleiterkörper A method for producing a connection contact on a semiconductor body
06/05/2008DE102006045688B3 Trench capacitor's memory electrode and selection transistor i.e. self-locking n-channel-FET, connecting structure, has connecting material with barrier layer utilized as diffusion barrier, made of silicon nitride and having small thickness
06/05/2008DE10111200B4 Integrierte Halbleiterschaltung A semiconductor integrated circuit
06/05/2008CA2669949A1 Method of manufacturing silicon carbide semiconductor device
06/04/2008EP1928021A1 Method of manufacturing a semiconductor device with dual fully silicided gate
06/04/2008EP1928020A1 Method of manufacturing a semiconductor heterostructure
06/04/2008EP1928019A2 Power supply apparatus and deposition method using the power supply apparatus
06/04/2008EP1928018A2 Method for attaching and peeling pressure-sensitive adhesive sheet, and attaching apparatus of pressure-sensitive adhesive sheet and peeling apparatus of pressure-sensitive adhesive sheet
06/04/2008EP1928017A1 Plasma reactor substrate mounting surface texturing
06/04/2008EP1928016A1 Silicon wafer and method for manufacturing the same
06/04/2008EP1928015A2 Organosilane compounds for modifying etch properties of silicon oxide and silicon nitride films
06/04/2008EP1928014A2 Charge trap layer for a charge trap semiconductor memory device and method of manufacturing the same
06/04/2008EP1928013A2 Formation and treatment of epitaxial layer containing silicon and carbon
06/04/2008EP1928012A2 Semiconductor device and method of its manufacture
06/04/2008EP1928011A2 Manufacturing method of capacitor electrode, manufacturing system of capacitor electrode, and storage medium
06/04/2008EP1927605A1 Polymer material, foam obtained from same, and polishing pad using those
06/04/2008EP1927592A1 Oxetane-containing compound, photoresist composition having the same, method of preparing pattern using the photoresist composition, and inkjet print head including polymerization products of the oxetane-containing compound
06/04/2008EP1927434A1 CMP conditioner
06/04/2008EP1927433A1 Device for separating two disc-shaped elements positioned one above the other when removing one
06/04/2008EP1927138A1 Semiconductor device
06/04/2008EP1927137A1 Method for cutting solid-state image pickup device
06/04/2008EP1927136A2 Method of manufacturing semiconductor device with different metallic gates
06/04/2008EP1927135A2 Method of manufacturing semiconductor device with different metallic gates
06/04/2008EP1927134A2 A structure for a semiconductor device and a method of manufacturing the same
06/04/2008EP1927133A2 Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method
06/04/2008EP1927132A2 Power semiconductor module and a method for the production thereof
06/04/2008EP1927131A2 Improved, higher selectivity, method for passivating short circuit current paths in semiconductor devices
06/04/2008EP1927130A1 A method of and an apparatus for processing a substrate
06/04/2008EP1927129A2 Electroplating method for coating a substrate surface with a metal
06/04/2008EP1927128A2 Multiple low and high k gate oxides on single gate for lower miller capacitance and improved drive current
06/04/2008EP1927127A2 High throughput crystallization of thin films
06/04/2008EP1927117A1 A trimmable film resistor and a method for forming and trimming a film resistor
06/04/2008EP1926843A1 Doping of particulate semiconductor materials
06/04/2008EP1926580A1 Reduction of attraction forces between silicon wafers
06/04/2008EP1738407A4 Arrayed ultrasonic transducer
06/04/2008EP1695379A4 Contoured insulator layer of silicon-on-onsulator wafers and process of manufacture
06/04/2008EP1552549A4 Method of fabricating a self-aligned non-volatile memory cell
06/04/2008EP1435098B1 Mram bit line word line architecture
06/04/2008EP1297385B1 Material and method for making an electroconductive pattern
06/04/2008EP1153739B1 Aerogel substrate and method for preparing the same
06/04/2008EP1141439A4 Distributed control system architecture and method for a material transport system
06/04/2008EP1082757B1 Semiconductor device with transparent link area for silicide applications and fabrication thereof
06/04/2008EP1033750B1 Vacuum processing device
06/04/2008CN201069767Y Supporting hook for silicon sheet plating film
06/04/2008CN201069448Y Vertical probe interface plate
06/04/2008CN101194547A Electronic component thermo-compression tool, and electronic component mounting apparatus and mounting method
06/04/2008CN101194364A Semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
06/04/2008CN101194359A Sub-mount and its manufacturing method
06/04/2008CN101194358A Semiconductor integrated circuit
06/04/2008CN101194357A 半导体集成电路装置 The semiconductor integrated circuit device
06/04/2008CN101194356A Technique for forming copper-containing lines embedded in low-k dielectric by providing a stiffening layer
06/04/2008CN101194355A Multi-bit nanocrystal memory
06/04/2008CN101194354A Aligner
06/04/2008CN101194353A Method for classifying semiconductor device
06/04/2008CN101194352A Semiconductor package pickup apparatus
06/04/2008CN101194351A Method for chemical vapor deposition in high aspect ratio spaces
06/04/2008CN101194350A Raised source and drain process with disposable spacers
06/04/2008CN101194349A Technique for reducing silicide non-uniformities by adapting a vertical dopant profile
06/04/2008CN101194348A Method of fabricating a heterojunction bipolar transistor
06/04/2008CN101194347A Methods of etching nickel silicide and cobalt silicide and methods of forming conductive lines
06/04/2008CN101194346A Improved recessed drain extensions in transistor device
06/04/2008CN101194345A Plasma nitriding method, method for manufacturing semiconductor device and plasma processing apparatus
06/04/2008CN101194344A UV curing process for spin-on dielectric materials used in pre-metal and/or shallow trench isolation applications
06/04/2008CN101194276A Semiconductor device
06/04/2008CN101194214A Stage apparatus
06/04/2008CN101194210A Exposing method and device
06/04/2008CN101194052A Low basal plane dislocation bulk grown SiC wafers
06/04/2008CN101194040A Rotating substrate support and methods of use
06/04/2008CN101193811A Substrate transfer apparatus
06/04/2008CN101193732A Device and method for positioning and blocking thin substrates on a cut substrate block
06/04/2008CN101193728A Advanced chemical mechanical polishing system with smart endpoint detection
06/04/2008CN101193724A Method and apparatus for forming a low profile wire loop