Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2008
05/29/2008US20080124905 Solid-State Circuit Assembly
05/29/2008US20080124904 Method for Fabricating Semiconductor Device
05/29/2008US20080124903 Techniques for low-temperature ion implantation
05/29/2008US20080124902 Method of manufacturing a semiconductor device comprising a field stop zone at a specific depth
05/29/2008US20080124901 Method for maintaining semiconductor manufacturing apparatus, semiconductor manufacturing apparatus, and method for manufacturing semiconductor
05/29/2008US20080124900 Method for introduction impurities and apparatus for introducing impurities
05/29/2008US20080124899 Method of improving a surface of a semiconductor substrate
05/29/2008US20080124898 Wafer laser processing method and laser beam processing machine
05/29/2008US20080124897 Method of producing bonded wafer
05/29/2008US20080124896 Silicon wafer thinning end point method
05/29/2008US20080124895 Wafer bonding method
05/29/2008US20080124894 Method of forming isolation layer of semiconductor device
05/29/2008US20080124893 Method of manufacturing a semiconductor device
05/29/2008US20080124892 Method of manufacturing semiconductor device
05/29/2008US20080124891 Method for Preventing Wafer Edge Peeling in Metal Wiring Process
05/29/2008US20080124890 Method for forming shallow trench isolation structure
05/29/2008US20080124889 Process of forming an electronic device including a conductive structure extending through a buried insulating layer
05/29/2008US20080124888 Semiconductor device isolation structures
05/29/2008US20080124887 Method for manufacturing semiconductor device
05/29/2008US20080124886 Method of fabricating capacitor over bit line and bottom electrode thereof
05/29/2008US20080124885 Method of fabricating capacitor and electrode thereof
05/29/2008US20080124884 Methods for fabricating a semiconductor device on an soi substrate
05/29/2008US20080124883 Semiconductor structure and method of manufacture
05/29/2008US20080124882 Sige heterojunction bipolar transistor (hbt) and method of fabrication
05/29/2008US20080124881 INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR Si-Ge BIPOLAR TECHNOLOGY
05/29/2008US20080124880 Fet structure using disposable spacer and stress inducing layer
05/29/2008US20080124879 Method for Fabricating Semiconductor Device
05/29/2008US20080124878 Multi-component strain-inducing semiconductor regions
05/29/2008US20080124877 Methods for fabricating a stress enhanced mos circuit
05/29/2008US20080124876 Method for Forming Contact Hole in Semiconductor Device
05/29/2008US20080124875 Method for forming a strained channel in a semiconductor device
05/29/2008US20080124874 Methods of Forming Field Effect Transistors Having Silicon-Germanium Source and Drain Regions
05/29/2008US20080124873 Method of fabricating semiconductor device having gate dielectrics with different thicknesses
05/29/2008US20080124872 Method of integrating triple gate oxide thickness
05/29/2008US20080124871 Methods of fabricating semiconductor device including fin-fet
05/29/2008US20080124870 Trench Gate FET with Self-Aligned Features
05/29/2008US20080124869 Methods of manufacturing vertical channel semiconductor devices
05/29/2008US20080124868 Fin-type field effect transistor
05/29/2008US20080124867 Methods of forming vertical transistors
05/29/2008US20080124866 Methods of Fabricating Semiconductor Devices
05/29/2008US20080124865 Method for forming non-volatile memory with shield plate for limiting cross coupling between floating gates
05/29/2008US20080124864 Method for decreasing pn junction leakage current of dynamic random access memory
05/29/2008US20080124863 Trench Memory
05/29/2008US20080124862 Semiconductor device and manufacturing method thereof
05/29/2008US20080124861 Electron mobility enhancement for MOS devices with nitrided polysilicon re-oxidation
05/29/2008US20080124860 Metal Gated Ultra Short MOSFET Devices
05/29/2008US20080124859 Methods of Forming CMOS Integrated Circuits Using Gate Sidewall Spacer Reduction Techniques
05/29/2008US20080124858 Selective stress relaxation by amorphizing implant in strained silicon on insulator integrated circuit
05/29/2008US20080124857 Cmos device with metal and silicide gate electrodes and a method for making it
05/29/2008US20080124856 Method of manufacturing semiconductor device
05/29/2008US20080124855 Modulation of Stress in ESL SiN Film through UV Curing to Enhance both PMOS and NMOS Transistor Performance
05/29/2008US20080124854 Method for fabricating a semiconductor device and a semiconductor device fabricated by the method
05/29/2008US20080124853 Vertical-channel junction field-effect transistors having buried gates and methods of making
05/29/2008US20080124852 Method of forming T- or gamma-shaped electrode
05/29/2008US20080124851 GaN-based high electron mobility transistor and method for making the same
05/29/2008US20080124850 Method for manufacturing semiconductor device and heat treatment method
05/29/2008US20080124849 Fabricating method of semiconductor device
05/29/2008US20080124848 Electronics device, semiconductor device, and method for manufacturing the same
05/29/2008US20080124847 Reducing Crystal Defects from Hybrid Orientation Technology During Semiconductor Manufacture
05/29/2008US20080124846 Method of fabricating thin film transistor
05/29/2008US20080124845 Stacked structures and methods of fabricating stacked structures
05/29/2008US20080124844 Method of manufacturing well pick-up structure of non-volatile memory
05/29/2008US20080124843 Resin for sealing semiconductor device, resin-sealed semiconductor device and the method of manufacturing the semiconductor device
05/29/2008US20080124842 Method and apparatus for linear die transfer
05/29/2008US20080124841 Reduction of Damage to Thermal Interface Material Due to Asymmetrical Load
05/29/2008US20080124840 Electrical Insulating Layer for Metallic Thermal Interface Material
05/29/2008US20080124839 Curable blend of acrylic polymer, an epoxy thermosetting resin having an unsaturated hydrocarbon group and a thermosetting agent; photopolymerization; reliability in a package in which a semiconductor chip of reduced thickness is mounted even when exposed to severe reflow conditions
05/29/2008US20080124838 Gold/silicon eutectic die bonding method
05/29/2008US20080124837 Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps
05/29/2008US20080124836 Packaging substrate and manufacturing method thereof
05/29/2008US20080124835 Hermetic seal and reliable bonding structures for 3d applications
05/29/2008US20080124834 Mounting method of semiconductor element and manufacturing method of semiconductor device
05/29/2008US20080124828 Fabrication processes of a MEMS alloy probe
05/29/2008US20080124825 Manufacturing method of liquid crystal display device
05/29/2008US20080124824 Method for forming electronic devices by using protecting layers
05/29/2008US20080124823 Method of fabricating patterned layer using lift-off process
05/29/2008US20080124821 Method for fabricating a pixel structur of organic electroluminescent display
05/29/2008US20080124820 Method and system for detecting existence of an undesirable particle during semiconductor fabrication
05/29/2008US20080124818 Method and system for reducing the variation in film thickness on a plurality of semiconductor wafers having multiple deposition paths in a semiconductor manufacturing process
05/29/2008US20080124817 Stress measurement and stress balance in films
05/29/2008US20080124816 Systems and methods for semiconductor structure processing using multiple laser beam spots
05/29/2008US20080124815 Pre-cleaning damaged insulating layer of semiconductor; depositing a CNH polymeric caps; treating with ultraviolet radiation; reacting vinyl-substituted carbosilazane, polyperhydridosilazane, polysilazane or an alkynyl silane; nitriding, carbonitriding, boronitriding; chemical vapor deposition
05/29/2008US20080124814 Method for passivation of plasma etch defects in DRAM devices
05/29/2008US20080124648 Resist Pattern Forming Method, Supercritical Processing Solution For Lithography Process, And Antireflection Film Forming Method
05/29/2008US20080124633 Includes a mask substrate having patterns arranged at a pitch P; and a pellicle which protects the mask substrate; pellicle is configured so that transmittance of incident light of an incident angle theta is higher than transmittance of incident light of an incident angle 0 degrees
05/29/2008US20080124547 Partially insulation coated metal wire for wire bonding and wire bonding method for semiconductor package using the same
05/29/2008US20080124545 Monocrystal, Nano Wire Material, Electronic Element, and Method of Producing Nano Wire Material
05/29/2008US20080124526 System and process for processing a plurality of semiconductor thin films which are crystallized using sequential lateral solidification techniques
05/29/2008US20080124510 Large area, uniformly low dislocation density gan substrate and process for making the same
05/29/2008US20080124457 Transparent conductive film
05/29/2008US20080124207 Supporting pin
05/29/2008US20080124206 Wafer transfer apparatus
05/29/2008US20080124200 System and method for introducing a substrate into a process chamber
05/29/2008US20080124199 Apparatus for attaching substrates
05/29/2008US20080124198 Apparatus for attaching substrates
05/29/2008US20080124197 Semiconductor manufacturing process modules
05/29/2008US20080124196 Semiconductor manufacturing process modules
05/29/2008US20080124195 Semiconductor manufacturing process modules
05/29/2008US20080124194 Semiconductor manufacturing process modules
05/29/2008US20080124193 Semiconductor manufacturing process modules