Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2009
04/30/2009US20090113371 Routing interconnect of integrated circuit designs
04/30/2009US20090113230 Semiconductor integrated circuit device
04/30/2009US20090112009 Amorphous ge/te deposition process
04/30/2009US20090111522 Smart Card and Method for Manufacturing Said Card
04/30/2009US20090111362 Polishing Apparatus
04/30/2009US20090111358 Polishing apparatus and polishing method
04/30/2009US20090111285 Substrate treatment apparatus, method for manufacturing substrate, and method for manufacturing semiconductor device
04/30/2009US20090111284 Method for silicon based dielectric chemical vapor deposition
04/30/2009US20090111283 Method for forming interlayer insulating film of semiconductor device
04/30/2009US20090111282 Methods of using thin metal layers to make carbon nanotube films, layers, fabrics, ribbons, elements and articles
04/30/2009US20090111281 Frequency doubling using a photo-resist template mask
04/30/2009US20090111280 Method for removing oxides
04/30/2009US20090111279 Functional film containing structure and method of manufacturing functional film
04/30/2009US20090111278 Manufacturing method for semiconductor device and manufacturing apparatus for semiconductor device
04/30/2009US20090111277 Wet photoresist strip for wafer bumping with ozonated acetic anhydride
04/30/2009US20090111276 Temperature control module using gas pressure to control thermal conductance between liquid coolant and component body
04/30/2009US20090111275 Plasma etching method and storage medium
04/30/2009US20090111274 Methods of Manufacturing a Semiconductor Device and Apparatus and Etch Chamber for the Manufacturing of Semiconductor Devices
04/30/2009US20090111273 Method for Manufacturing Semiconductor Device
04/30/2009US20090111272 Method of forming strain-causing layer for mos transistors and process for fabricating strained mos transistors
04/30/2009US20090111271 Isotropic silicon etch using anisotropic etchants
04/30/2009US20090111270 Method for Forming Patterns in Semiconductor Memory Device
04/30/2009US20090111269 Silicon wafer reclamation process
04/30/2009US20090111268 Reworking method for integrated circuit devices
04/30/2009US20090111267 Method of anti-stiction dimple formation under mems
04/30/2009US20090111266 Method of Forming Gate of Semiconductor Device
04/30/2009US20090111265 Selective silicide formation using resist etchback
04/30/2009US20090111264 Plasma-enhanced cyclic layer deposition process for barrier layers
04/30/2009US20090111263 Method of Forming Programmable Via Devices
04/30/2009US20090111262 Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation
04/30/2009US20090111261 Over-passivation process of forming polymer layer over IC chip
04/30/2009US20090111260 Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument
04/30/2009US20090111259 Methods for forming connective elements on integrated circuits for packaging applications
04/30/2009US20090111258 Method for Manufacturing a Semiconductor Device
04/30/2009US20090111257 Techniques for Impeding Reverse Engineering
04/30/2009US20090111256 Method for fabricating semiconductor device
04/30/2009US20090111255 Method for fabricating transistor in semiconductor device
04/30/2009US20090111254 Method for fabricating semiconductor device
04/30/2009US20090111253 Method for producing a transistor gate with sub-photolithographic dimensions
04/30/2009US20090111252 Method for forming deep well region of high voltage device
04/30/2009US20090111251 Exposure mask and method for fabricating thin-film transistor
04/30/2009US20090111250 Method for preparing compound semiconductor substrate
04/30/2009US20090111249 Multilevel Phase Change Memory
04/30/2009US20090111248 Manufacturing method of soi substrate
04/30/2009US20090111247 Formation method of single crystal semiconductor layer, formation method of crystalline semiconductor layer, formation method of polycrystalline layer, and method for manufacturing semiconductor device
04/30/2009US20090111246 Inhibitors for selective deposition of silicon containing films
04/30/2009US20090111245 Method for manufacturing bonded wafer
04/30/2009US20090111244 Method for manufacturing semiconductor device
04/30/2009US20090111243 Soi substrates with a fine buried insulating layer
04/30/2009US20090111242 Method for producing semiconductor substrate
04/30/2009US20090111241 Wafer bonding method
04/30/2009US20090111240 Method of manufacturing semiconductor device
04/30/2009US20090111239 Method for manufacturing semiconductor device
04/30/2009US20090111238 Method for manufacturing semiconductor device capable of increasing current drivability of pmos transistor
04/30/2009US20090111237 Method for manufacturing semiconductor substrate
04/30/2009US20090111236 Method for manufacturing soi substrate
04/30/2009US20090111235 Semiconductor Integrated Circuit Devices Having High-Q Wafer Back-Side Capacitors
04/30/2009US20090111234 Method for forming min capacitor in a copper damascene interconnect
04/30/2009US20090111233 Method of forming junction of semiconductor device
04/30/2009US20090111232 Semiconductor device having decoupling capacitor and method of fabricating the same
04/30/2009US20090111231 Method for Forming Shielded Gate Field Effect Transistor Using Spacers
04/30/2009US20090111230 Method of manufacturing semiconductor device
04/30/2009US20090111229 Method of forming a split gate non-volatile memory cell
04/30/2009US20090111228 Self aligned ring electrodes
04/30/2009US20090111227 Method for Forming Trench Gate Field Effect Transistor with Recessed Mesas Using Spacers
04/30/2009US20090111226 Method for integrating nvm circuitry with logic circuitry
04/30/2009US20090111225 Cmos structure and method including multiple crystallographic planes
04/30/2009US20090111224 Fusi integration method using sog as a sacrificial planarization layer
04/30/2009US20090111223 Soi device having a substrate diode formed by reduced implantation energy
04/30/2009US20090111222 Semiconductor chip mounting method, semiconductor mounting wiring board producing method and semiconductor mounting wiring board
04/30/2009US20090111221 Fabrication method of semiconductor device
04/30/2009US20090111219 Wafer-level chip scale package and method for fabricating and using the same
04/30/2009US20090111218 Stack mcp and manufacturing method thereof
04/30/2009US20090111217 Method of manufacturing chip-on-chip semiconductor device
04/30/2009US20090111216 Application of hipims to through silicon via metallization in three-dimensional wafer packaging
04/30/2009US20090111215 Modular Chip Integration Techniques
04/30/2009US20090111214 Method for Improved Power Distribution in a Three Dimensional Vertical Integrated Circuit
04/30/2009US20090111213 High-Density Fine Line Structure And Method Of Manufacturing The Same
04/30/2009US20090111212 Method and apparatus for chalcogenide device formation
04/30/2009US20090111211 Flat panel display and manufacturing method of flat panel display
04/30/2009US20090111209 Method for patterning mo layer in a photovoltaic device comprising cigs material using an etch process
04/30/2009US20090111208 Colors only process to reduce package yield loss
04/30/2009US20090111207 Method of fabricating an integrated detection biosensor
04/30/2009US20090111206 Collector grid, electrode structures and interrconnect structures for photovoltaic arrays and methods of manufacture
04/30/2009US20090111205 Method of seperating two material systems
04/30/2009US20090111204 Vertically Aligned Mode Liquid Crystal Display
04/30/2009US20090111203 Method for manufacturing semiconductor light emitting device
04/30/2009US20090111201 Ridge and mesa optical waveguides
04/30/2009US20090111200 Method for Fabricating Electronic and Photonic Devices on a Semiconductor Substrate
04/30/2009US20090111199 Method of manufacturing flat panel display
04/30/2009US20090111198 Method for manufacturing semiconductor device
04/30/2009US20090111036 Scanning beam of metallic ions over defect to dope, reducing transparency; implanting gallium atoms to reduce transmission and quartz can be etched
04/30/2009US20090110898 High resistivity soi base wafer using thermally annealed substrate
04/30/2009US20090110880 Systems, methods, and apparatus of a low conductance silicon micro-leak for mass spectrometer inlet
04/30/2009US20090110591 a photocatalyst comprising a substrate having curved portion, a semiconductor thin film overlying the curved portion; contacting thin film with a fluid, exposing photocatalyst to light, causing generation of oxidizing species at the surface of photocatalyst in contact with the fluid, detoxification
04/30/2009US20090110532 Method and apparatus for providing wafer centering on a track lithography tool
04/30/2009US20090110521 Wafer holder
04/30/2009US20090110520 Advanced fi blade for high temperature extraction
04/30/2009US20090110519 Semiconductor manufacturing apparatus and method for loading/unloading wafer via variable setting of slot
04/30/2009US20090110518 Sealed substrate carriers and systems and methods for transporting