Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2009
08/27/2009US20090215250 Plasma immersion ion implantation process with reduced polysilicon gate loss and reduced particle deposition
08/27/2009US20090215249 Method of forming an embedded silicon carbon epitaxial layer
08/27/2009US20090215248 AlxInyGa1-x-yN MIXTURE CRYSTAL SUBSTRATE, METHOD OF GROWING SAME AND METHOD OF PRODUCING SAME
08/27/2009US20090215247 Manufacturing method of semiconductor device
08/27/2009US20090215246 Method for breaking adhesive film mounted on back of wafer
08/27/2009US20090215245 Wafer dividing method
08/27/2009US20090215244 Package Having Exposed Integrated Circuit Device
08/27/2009US20090215243 Method of manufacturing semiconductor device
08/27/2009US20090215242 Semiconductor device and method of manufacturing the same
08/27/2009US20090215241 Manufacturing method for semiconductor devices
08/27/2009US20090215240 Semiconductor device with strained transistors and its manufacture
08/27/2009US20090215239 Method of manufacturing semiconductor device
08/27/2009US20090215238 Methods of fabricating semiconductor devices with enlarged recessed gate electrodes
08/27/2009US20090215237 Method of forming lateral trench MOSFET with direct trench polysilicon contact
08/27/2009US20090215236 Relaxed-pitch method of aligning active area to digit line
08/27/2009US20090215235 Arrangement with Two Transistors and Method for the Production Thereof
08/27/2009US20090215234 Semiconductor device, design method and structure
08/27/2009US20090215233 Photoresist composition and method of manufacturing array substrate using the same
08/27/2009US20090215232 Schottky barrier tunnel transistor and method of manufacturing the same
08/27/2009US20090215231 Method of manufacturing electronic component built-in substrate
08/27/2009US20090215230 Manufacturing method of semiconductor device
08/27/2009US20090215229 Board on chip package and method of manufacturing the same
08/27/2009US20090215228 Wafer lever fixture and method for packaging micro-electro-mechanical-system devices
08/27/2009US20090215227 Chip Scale Package Fabrication Methods
08/27/2009US20090215226 Method of Detaching a Thin Semiconductor Circuit From Its Base
08/27/2009US20090215225 Tellurium compounds useful for deposition of tellurium containing materials
08/27/2009US20090215224 Coating methods and apparatus for making a cigs solar cell
08/27/2009US20090215222 Manufacturing method of semiconductor device
08/27/2009US20090215221 Image sensor and method for manufacturing the same
08/27/2009US20090215220 Solid-state image capturing device, image capturing device, and manufacturing method of solid-state image capturing device
08/27/2009US20090215218 Method for making solar cell having crystalline silicon p-n homojunction and amorphous silicon heterojunctions for surface passivation
08/27/2009US20090215216 Packaging method of image sensing device
08/27/2009US20090215214 Method of Sealing a Cavity
08/27/2009US20090215213 Microelectromechanical device having a common ground plane and method for making aspects thereof
08/27/2009US20090215212 Method for Fabricating A Flat Panel Display
08/27/2009US20090215211 Method Of Fabricating Microchannel Plate Devices With Multiple Emissive Layers
08/27/2009US20090215209 Methods of depositing material, methods of making a device, and systems and articles for use in depositing material
08/27/2009US20090215208 Composition including material, methods of depositing material, articles including same and systems for depositing material
08/27/2009US20090215207 Alignment method of two substrates by microcoils
08/27/2009US20090215206 System and method for controlling a semiconductor manufacturing process
08/27/2009US20090215205 Shower head structure for processing semiconductor
08/27/2009US20090215204 Fabrication method of semiconductor device
08/27/2009US20090215203 Monitoring of temperature variation across wafers during processing
08/27/2009US20090215202 Controlled edge resistivity in a silicon wafer
08/27/2009US20090215201 Method for controlling spatial temperature distribution across a semiconductor wafer
08/27/2009US20090215156 Method for Fabricating Nanogap and Nanogap Sensor
08/27/2009US20090214985 Method for reducing surface defects on patterned resist features
08/27/2009US20090214960 Resist composition and patterning process
08/27/2009US20090214843 Controlled edge resistivity in a silicon wafer
08/27/2009US20090214798 Apparatus and method for front side protection during backside cleaning
08/27/2009US20090214786 High speed, concurrent processing of multiple wafers using multi-stations separated by gas curtains where platens support and rotates wafers into specific deposition positions and where reactant gases are supplied through single- or multi-zone gas dispensing nozzles; atomic layer deposition
08/27/2009US20090214758 A processing method for processing a substrate placed on a placement stage in a process chamber
08/27/2009US20090214326 System and method for inspecting chips in a tray and tray handling apparatus thereof
08/27/2009US20090214323 Substrate carrier system
08/27/2009US20090213892 Vcsel with reduced light scattering within optical cavity
08/27/2009US20090213888 Semiconductor laser device and manufacturing method therefor
08/27/2009US20090213887 Semiconductor laser and method of manuracture
08/27/2009US20090213884 Integrated photonic semiconductor devices and methods for making integrated photonic semiconductor devices
08/27/2009US20090213656 Flash memory having insulating liners between source/drain lines and channels
08/27/2009US20090213642 Integrated Circuit, Memory Cell Arrangement, Memory Cell, Memory Module, Method of Operating an Integrated Circuit, and Method of Manufacturing a Memory Cell
08/27/2009US20090213633 Four vertically stacked memory layers in a non-volatile re-writeable memory device
08/27/2009US20090213450 Support structures for electromechanical systems and methods of fabricating the same
08/27/2009US20090213389 Wavefront aberration measuring method, mask, wavefront aberration measuring device, exposure apparatus, and device manufacturing method
08/27/2009US20090213388 Measurement method and measurement reticle
08/27/2009US20090213367 Transmissive element
08/27/2009US20090213365 Device and method for checking and rotating electronic components
08/27/2009US20090213353 Lithographic Apparatus and Device Manufacturing Method
08/27/2009US20090213347 Article Loading/Unloading Method and Article Loading/Unloading Device, Exposure Method and Exposure Apparatus, and Method of Manufacturing Device
08/27/2009US20090213314 Liquid crystal display device and manufacturing method therefor
08/27/2009US20090213310 Manufacturing method of transflective lcd and transflective lcd thereof
08/27/2009US20090212884 Nanotube device
08/27/2009US20090212854 Asymmetric Segmented Channel Transistors
08/27/2009US20090212843 Semiconductor device arrangement and method
08/27/2009US20090212664 Micro movable device and method of making the same using wet etching
08/27/2009US20090212447 Mark Structure for Coarse Wafer Alignment and Method for Manufacturing Such a Mark Structure
08/27/2009US20090212446 Semiconductor Device
08/27/2009US20090212444 Semiconductor package and method of manufacturing the same
08/27/2009US20090212443 Integrated circuit package substrate having configurable bond pads
08/27/2009US20090212441 Semiconductor Interconnect Structure with Stacked Vias Separated by Signal Line and Method Therefor
08/27/2009US20090212439 Fluorine depleted adhesion layer for metal interconnect structure
08/27/2009US20090212438 Integrated circuit device comprising conductive vias and method of making the same
08/27/2009US20090212436 Semiconductor structure and method for forming the same
08/27/2009US20090212435 Power semiconductor device including a double metal contact
08/27/2009US20090212434 Methods of manufacturing semiconductor devices and a semiconductor structure
08/27/2009US20090212433 Structure and process for metallization in high aspect ratio features
08/27/2009US20090212431 Thermally programmable anti-reverse engineering interconnects and methods of fabricating same
08/27/2009US20090212429 Semiconductor Device and Method of Supporting a Wafer During Backgrinding and Reflow of Solder Bumps
08/27/2009US20090212428 Re-distribution conductive line structure and the method of forming the same
08/27/2009US20090212426 Semiconductor device and manufacturing method thereof
08/27/2009US20090212425 Semiconductor device and a method of manufacturing the same
08/27/2009US20090212424 Routing structure of re-distribution layer and method for re-distributing routing structure in integrated circuit
08/27/2009US20090212423 Stacked solder balls for integrated circuit device packaging and assembly
08/27/2009US20090212421 Polymer interlayer dielectric and passivation materials for a microelectronic device
08/27/2009US20090212420 integrated circuit device and method for fabricating same
08/27/2009US20090212419 Integrated circuit package system with overhang film
08/27/2009US20090212418 Thermal interface material design for enhanced thermal performance and improved package structural integrity
08/27/2009US20090212417 Semiconductor Device
08/27/2009US20090212416 Integrated circuit package and method of manufacturing same
08/27/2009US20090212411 Semiconductor device and manufacturing method therefor
08/27/2009US20090212409 Stackable Semiconductor Package and Stack Method Thereof
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