Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2010
12/16/2010US20100316800 Multi-station deposition apparatus and method
12/16/2010US20100316483 Transport method for disk-shaped workpieces
12/16/2010US20100316478 Pick-and-place module for test handler
12/16/2010US20100316467 Substrate storage facility
12/16/2010US20100316081 Vertical-cavity surface-emitting laser (vcsel) device and the method of manufacturing thereof
12/16/2010US20100316078 Surface plasmon generating apparatus and method for making the same
12/16/2010US20100316075 Optical Device Structure Using GaN Substrates for Laser Applications
12/16/2010US20100315884 Non-volatile memory utilizing impact ionization and tunnelling and method of manufacturing thereof
12/16/2010US20100315869 Spin torque transfer MRAM design with low switching current
12/16/2010US20100315864 Magnetoresistive element and magnetic memory
12/16/2010US20100315863 Magnetic Tunnel Junction Device and Fabrication
12/16/2010US20100315855 Rom array with shared bit-lines
12/16/2010US20100315704 Optical component for euvl and smooting method thereof
12/16/2010US20100315583 Pixel designs of improving the aperture ratio in an lcd
12/16/2010US20100315580 Thin film transistor array substrate, display panel, liquid crystal display apparatus and manufacturing method thereof
12/16/2010US20100315569 Pixel designs of improving the aperture ratio in an lcd
12/16/2010US20100315181 Vertical coplanar waveguide with tunable characteristic impedance design structure and method of fabricating the same
12/16/2010US20100315159 High voltage power integrated circuit
12/16/2010US20100315153 Apparatus and associated methods in relation to carbon nanotube networks
12/16/2010US20100315094 Overlay key, method of forming the overlay key and method of measuring overlay accuracy using the overlay key
12/16/2010US20100315012 Light emitting devices and systems having tunable chromaticity and methods of tuning the chromaticity of light emitting devices and systems
12/16/2010US20100314894 Fixed Jig, Chip Pickup Method and Chip Pickup Apparatus
12/16/2010US20100314799 Pattern forming method and pattern forming apparatus in which a substrate and a mold are aligned in an in-plane direction
12/16/2010US20100314782 Dicing tape-integrated film for semiconductor back surface
12/16/2010US20100314781 Dicing tape-integrated film for semiconductor back surface
12/16/2010US20100314780 Semiconductor Device and Method of Forming Vertical Interconnect Structure Between Non-Linear Portions of Conductive Layers
12/16/2010US20100314778 Semiconductor device and method for producing the same
12/16/2010US20100314777 Semiconductor device and method for manufacturing same
12/16/2010US20100314776 Connection pad structure for an image sensor on a thinned substrate
12/16/2010US20100314775 Explosion-proof module structure for power components, particularly power semiconductor components, and production thereof
12/16/2010US20100314773 Semiconductor device
12/16/2010US20100314769 For reducing electromigration effect in an integrated circuit
12/16/2010US20100314768 Interconnect structure fabricated without dry plasma etch processing
12/16/2010US20100314767 Self-aligned dual damascene beol structures with patternable low- k material and methods of forming same
12/16/2010US20100314766 Ulsi micro-interconnect member having ruthenium electroplating layer on barrier layer
12/16/2010US20100314765 Interconnection structure of semiconductor integrated circuit and method for making the same
12/16/2010US20100314764 Hybrid metallic wire and methods of fabricating same
12/16/2010US20100314763 Integrated circuit system employing low-k dielectrics and method of manufacture thereof
12/16/2010US20100314762 Semiconductor Substrate with Through-Contact and Method for Production Thereof
12/16/2010US20100314758 Through-silicon via structure and a process for forming the same
12/16/2010US20100314757 Semiconductor device and method of manufacturing the same
12/16/2010US20100314754 Method of forming wire bonds in semiconductor devices
12/16/2010US20100314752 Forming an etched planarised photonic crystal structure
12/16/2010US20100314751 Processes and structures for IC fabrication
12/16/2010US20100314748 Chip packaging method and structure thereof
12/16/2010US20100314747 Electronic device package and method of manufacture
12/16/2010US20100314746 Semiconductor package and manufacturing method thereof
12/16/2010US20100314745 Copper pillar bonding for fine pitch flip chip devices
12/16/2010US20100314744 Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereof
12/16/2010US20100314743 Integrated circuit package having a castellated heatspreader
12/16/2010US20100314741 Integrated circuit package stacking system with redistribution and method of manufacture thereof
12/16/2010US20100314739 Package-on-package technology for fan-out wafer-level packaging
12/16/2010US20100314738 Integrated circuit packaging system with a stack package and method of manufacture thereof
12/16/2010US20100314737 Intra-Die Routing Using Back Side Redistribution Layer and Associated Method
12/16/2010US20100314736 Integrated circuit packaging system with package-on-package and method of manufacture thereof
12/16/2010US20100314735 Processes and structures for IC fabrication
12/16/2010US20100314734 Processes and structures for IC fabrication
12/16/2010US20100314733 Apparatus for restricting moisture ingress
12/16/2010US20100314732 Enhanced integrated circuit package
12/16/2010US20100314731 Integrated circuit packaging system with high lead count and method of manufacture thereof
12/16/2010US20100314728 Ic package having an inductor etched into a leadframe thereof
12/16/2010US20100314726 Faraday cage for circuitry using substrates
12/16/2010US20100314725 Stress Balance Layer on Semiconductor Wafer Backside
12/16/2010US20100314724 Selective UV-Ozone Dry Etching of Anti-Stiction Coatings for MEMS Device Fabrication
12/16/2010US20100314723 Manufacturing of optical structures by electrothermal focussing
12/16/2010US20100314722 Soi wafer, semiconductor device, and method for manufacturing soi wafer
12/16/2010US20100314721 Semiconductor Package and Method for Producing the Same
12/16/2010US20100314719 Processes and structures for IC fabrication
12/16/2010US20100314718 Processes and structures for IC fabrication
12/16/2010US20100314717 Semiconductor substrate, semiconductor device, and manufacturing methods thereof
12/16/2010US20100314716 Circuit configuration and manufacturing processes for vertical transient voltage suppressor (TVS) and EMI filter
12/16/2010US20100314713 Integrated Circuit Inductors with Reduced Magnetic Coupling
12/16/2010US20100314711 3d integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer
12/16/2010US20100314707 Reduced Process Sensitivity of Electrode-Semiconductor Rectifiers
12/16/2010US20100314705 Semiconductor device module, method of manufacturing a semiconductor device module, semiconductor device module manufacturing device
12/16/2010US20100314701 Pressure sensor and manufacturing method thereof
12/16/2010US20100314700 Fabricating method for micro gas sensor and the same
12/16/2010US20100314699 Electrochemical sensor device, method of manufacturing the same
12/16/2010US20100314698 Methods of manufacturing metal-silicide features
12/16/2010US20100314696 Field-effect transistor and method of fabricating same
12/16/2010US20100314695 Self-aligned vertical group III-V transistor and method for fabricated same
12/16/2010US20100314694 Semiconductor device and manufacturing method thereof
12/16/2010US20100314692 Structures Of SRAM Bit Cells
12/16/2010US20100314691 Method for selective gate halo implantation in a semiconductor die and related structure
12/16/2010US20100314687 Metal gate transistor, integrated circuits, systems, and fabrication methods thereof
12/16/2010US20100314685 Charging protection device
12/16/2010US20100314684 Finfet with separate gates and method for fabricating a finfet with separate gates
12/16/2010US20100314682 Configurations and methods for manufacturing devices with trench-oxide-nano-tube super-junctions
12/16/2010US20100314678 Non-volatile memory device and method for fabricating the same
12/16/2010US20100314677 Semiconductor storage device and method of manufacturing the same
12/16/2010US20100314676 Semiconductor device having plural dram memory cells and a logic circuit and method for manufacturing the same
12/16/2010US20100314674 Semiconductor device and method for manufacturing the same
12/16/2010US20100314672 Semiconductor device, method for manufacturing same, and solid-state image sensing device
12/16/2010US20100314669 Capacitive mems switch and method of fabricating the same
12/16/2010US20100314668 Device with integrated circuit and encapsulated n/mems and method for production
12/16/2010US20100314662 Semiconductor structure and method of manufacturing a semiconductor structure
12/16/2010US20100314661 Semiconductor substrate, method of fabricating the same, semiconductor device, and method of fabricating the same
12/16/2010US20100314660 Two terminal multi-channel esd device and method therefor
12/16/2010US20100314640 Indium gallium nitride-based ohmic contact layers for gallium nitride-based devices
12/16/2010US20100314637 Heat releasing semiconductor package, method for manufacturing the same, and display apparatus including the same
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