| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 01/15/2003 | CN1391229A Clock syncronous semiconductor memory |
| 01/15/2003 | CN1391227A 非同步fifo控制器 Asynchronous fifo controller |
| 01/15/2003 | CN1099119C Semiconductor memory device having circuit array strcture for fast operation |
| 01/15/2003 | CN1099117C Method for achieving high bandwidth semicondctor memory device and arranging signal lines thereof |
| 01/15/2003 | CN1099091C Method for utilizing IC card memory to record/reproduce digital voice |
| 01/15/2003 | CN1099076C System and method for reducing power consumption in electronic circuit |
| 01/14/2003 | US6507900 Semiconductor memory device including plural blocks with selecting and sensing or reading operations in different blocks carried out in parallel |
| 01/14/2003 | US6507898 Reconfigurable data cache controller |
| 01/14/2003 | US6507887 Binary data memory design with data stored in low-power sense |
| 01/14/2003 | US6507885 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure |
| 01/14/2003 | US6507534 Column decoder circuit for page reading of a semiconductor memory |
| 01/14/2003 | US6507528 Circuit configuration for generating sense amplifier control signals |
| 01/14/2003 | US6507527 Memory line discharge before sensing |
| 01/14/2003 | US6507526 Semiconductor memory with improved auto precharge |
| 01/14/2003 | US6507525 Differential sensing in a memory |
| 01/14/2003 | US6507523 Non-volatile memory with power standby |
| 01/14/2003 | US6507222 High speed single ended sense amplifier |
| 01/14/2003 | US6507219 Charge sharing and charge recycling for an on-chip bus |
| 01/09/2003 | WO2003003706A2 In vivo imaging device with a small cross sectional area |
| 01/09/2003 | WO2003003376A1 System and method for early write to memory by holding bitline at fixed potential |
| 01/09/2003 | WO2003003262A1 Multi input memory device reader |
| 01/09/2003 | WO2003003227A1 System and method for delaying a strobe signal |
| 01/09/2003 | WO2003003220A2 Interface for removable storage devices |
| 01/09/2003 | US20030009644 Bi-directional RAM for data transfer using two clock frequencies having no multiple relation |
| 01/09/2003 | US20030009642 Data storing circuit and data processing apparatus |
| 01/09/2003 | US20030009617 Method for reducing power consumption through dynamic memory stoarge inversion |
| 01/09/2003 | US20030007414 Clock synchronous circuit |
| 01/09/2003 | US20030007412 Limited swing driver circuit |
| 01/09/2003 | US20030007410 Semiconductor memory device having error correction function for data reading during refresh operation |
| 01/09/2003 | US20030007408 Cam circuit with error correction |
| 01/09/2003 | US20030007407 Semiconductor memory device, method for controlling same, and electronic information apparatus |
| 01/09/2003 | US20030007406 Memory system capable of increasing utilization efficiency of semiconductor memory device and method of refreshing the semiconductor memory device |
| 01/09/2003 | US20030007405 Memory system and semiconductor memory device for enhancing bus efficiency and refresh method of the semiconductor memory device |
| 01/09/2003 | US20030007404 Sense amplifier circuit |
| 01/09/2003 | US20030007403 Semiconductor memory having a wide bus-bandwidth for input/output data |
| 01/09/2003 | US20030007394 System for data transfer between different clock domains, and for obtaining status of memory device during transfer |
| 01/09/2003 | US20030007392 Method for reading and storing binary memory cell signals and circuit arrangement |
| 01/09/2003 | US20030007391 Evaluation circuit for a DRAM |
| 01/09/2003 | US20030007390 Data output circuit of a memory device |
| 01/09/2003 | US20030007385 Non-volatile semiconductor memory |
| 01/09/2003 | US20030006283 Information storage apparatus and information processing apparatus using the same |
| 01/08/2003 | EP1274094A2 Bit line decoding scheme and circuit for dual bit memory with a dual bit selection |
| 01/08/2003 | EP1273009A2 Current conveyor and method for readout of mtj memories |
| 01/08/2003 | CN1390354A Controlling burst sequence in synchronous memories |
| 01/08/2003 | CN1389924A Nonvolatile semiconductor memory device |
| 01/08/2003 | CN1389917A Clock generating circuit, integrated circuit storage devices and method for using said devices |
| 01/08/2003 | CN1389872A 半导体存储器 Semiconductor memory |
| 01/08/2003 | CN1389871A Semiconductor memory device |
| 01/08/2003 | CN1389865A Device and method for reproducing information |
| 01/08/2003 | CN1098525C Synchronous semiconductor memorier its inner circuit actuated only by applied command according normal sequence |
| 01/08/2003 | CN1098162C Ink jet print head identification circuit with serial out, dynamic shift registers |
| 01/07/2003 | US6505270 Content addressable memory having longest prefix matching function |
| 01/07/2003 | US6505266 Method and apparatus for a mix signal module |
| 01/07/2003 | US6504790 Configurable DDR write-channel phase advance and delay capability |
| 01/07/2003 | US6504789 Semiconductor memory device |
| 01/07/2003 | US6504788 Semiconductor memory with improved soft error resistance |
| 01/07/2003 | US6504782 Semiconductor memory apparatus that can prevent write level of data to memory cell from dropping and improve sense speed at next cycle |
| 01/07/2003 | US6504780 Method and apparatus for completely hiding refresh operations in a dram device using clock division |
| 01/07/2003 | US6504779 Resistive cross point memory with on-chip sense amplifier calibration method and apparatus |
| 01/07/2003 | US6504778 Semiconductor memory device |
| 01/07/2003 | US6504777 Enhanced bitline equalization for hierarchical bitline architecture |
| 01/07/2003 | US6504776 Semiconductor memory device having sense amplifier |
| 01/07/2003 | US6504775 Bitline precharge |
| 01/07/2003 | US6504774 DDR SDRAM for stable read operation |
| 01/07/2003 | US6504767 Double data rate memory device having output data path with different number of latches |
| 01/07/2003 | US6504766 System and method for early write to memory by injecting small voltage signal |
| 01/07/2003 | US6504753 Method and apparatus for discharging memory array lines |
| 01/07/2003 | US6504745 High performance erasable programmable read-only memory (EPROM) devices with multiple dimension first-level bit lines |
| 01/07/2003 | US6504548 Data processing apparatus having DRAM incorporated therein |
| 01/07/2003 | US6504394 Configuration for trimming reference voltages in semiconductor chips, in particular semiconductor memories |
| 01/07/2003 | US6504255 Digit line architecture for dynamic memory |
| 01/07/2003 | US6504212 Method and apparatus for enhanced SOI passgate operations |
| 01/03/2003 | WO2003001673A2 Determining phase relationships using digital phase values |
| 01/03/2003 | WO2003001531A1 Proportional to temperature voltage generator |
| 01/03/2003 | WO2003001360A2 First-in, first-out memory system and method thereof |
| 01/03/2003 | WO2001090864A3 Timing control means for automatic compensation of timing uncertainties |
| 01/03/2003 | WO2001069837A3 Clock data recovery circuitry associated with programmable logic device circuitry |
| 01/02/2003 | US20030005346 System and method for delaying a strobe signal |
| 01/02/2003 | US20030005313 Microprocessor configuration with encryption |
| 01/02/2003 | US20030005255 Method and system for fast data access using a memory array |
| 01/02/2003 | US20030005216 Control device for semiconductor memory device and method of controlling semiconductor memory device |
| 01/02/2003 | US20030005214 Smart memory |
| 01/02/2003 | US20030005211 Method and apparatus for accessing banked embedded dynamic random access momory devices |
| 01/02/2003 | US20030005208 Synchronous integrated circuit device |
| 01/02/2003 | US20030004667 System and method for minimizing delay variation in double data rate strobes |
| 01/02/2003 | US20030002382 Low power precharge scheme for memory bit lines |
| 01/02/2003 | US20030002381 Semiconductor memory for logic-hybrid memory |
| 01/02/2003 | US20030002378 Semiconductor memory device and information processing system |
| 01/02/2003 | US20030002377 Semiconductor memory device, information apparatus, and method for determining access period for semiconductor memory device |
| 01/02/2003 | US20030002376 Method and system for fast memory access |
| 01/02/2003 | US20030002373 Semiconductor memory devices and methods including coupling and/or floating isolation control signal lines |
| 01/02/2003 | US20030002372 Charging circuit and semiconductor memory device using the same |
| 01/02/2003 | US20030002371 Auto precharge apparatus having autoprecharge gapless function protecting circuit in semiconductor memory device |
| 01/02/2003 | US20030002357 Register controlled DLL for reducing current consumption |
| 01/02/2003 | US20030002356 Signal delay control circuit in a semiconductor memory device |
| 01/02/2003 | US20030002355 Method of synchronizing read timing in a high speed memory system |
| 01/02/2003 | US20030002353 Integrated circuit memory devices having sense amplifiers therein that receive nominal and boosted supply voltages when active and methods of operating same |
| 01/02/2003 | US20030002351 Integrated memory circuit and method for reading a data item from a memory cell |
| 01/02/2003 | US20030002350 Distributed write data drivers for burst access memories |
| 01/02/2003 | US20030002349 System and method for early write to memory by injecting small voltage signal |