Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
05/2003
05/08/2003US20030088730 Dual purpose interface using refresh cycle
05/08/2003US20030088729 Nonvolatile memory device with double serial/parallel communication interface
05/08/2003US20030086578 Circuit for setting a signal propagation time for a signal on a signal line and method for ascertaining timing parameters
05/08/2003US20030086330 Expanded operating frequency synchronous semiconductor memory device having wave pipeline structure and wave pipeline control method thereof
05/08/2003US20030086329 Method of controlling data reading capable of increasing data transfer rate in SDRAM of the posted CAS standard
05/08/2003US20030086328 Predecode column architecture and method
05/08/2003US20030086324 Semiconductor memory device, control method thereof, and control method of semiconductor device
05/08/2003US20030086323 Serial access memory and data write/read method
05/08/2003US20030086322 Method for precharging memory cells of a dynamic semiconductor memory during power-up and semiconductor memory
05/08/2003US20030086317 Semiconductor memory device
05/08/2003US20030086316 RAM having dynamically switchable access modes
05/08/2003US20030086315 Semiconductor memory device
05/08/2003US20030086313 Magnetic memory device using SOI substrate and method of manufacturing the same
05/08/2003US20030086309 Semiconductor memory apparatus of which data are accessible by different addressing type
05/08/2003US20030086303 Data input circuits and methods of inputing data for a synchronous semiconductor memory device
05/08/2003US20030086302 Data write/read control method and memory device
05/08/2003US20030086301 Semiconductor memory apparatus
05/08/2003US20030086290 Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system
05/08/2003US20030086288 Semiconductor memory
05/08/2003US20030086278 Semiconductor device with small current consumption having stably operating internal circuitry
05/08/2003US20030085744 Delay locked loop circuit and method having adjustable locking resolution
05/08/2003US20030085137 Containers with additional functionality
05/08/2003CA2464212A1 Digital audio device
05/07/2003EP1308963A1 Semiconductor memory device
05/07/2003EP1308850A2 Computer bus configuration and input/output buffer
05/07/2003EP1308849A2 Bus configuration and input/output buffer
05/07/2003EP1308848A2 Computer bus configuration and input/output buffer
05/07/2003EP1308847A2 Computer bus configuration and input/output buffer
05/07/2003EP1307885A1 High speed sense amplifier
05/07/2003EP1307884A2 A high speed dram architecture with uniform access latency
05/07/2003EP1116098B1 Method and device for writing and reading a buffer memory
05/07/2003CN1416138A 半导体装置 Semiconductor device
05/07/2003CN1416136A Semiconductor device
05/07/2003CN1416134A 半导体装置 Semiconductor device
05/07/2003CN1416133A 半导体存储器 Semiconductor memory
05/07/2003CN1416132A 半导体装置 Semiconductor device
05/07/2003CN1416131A Semiconductor storage device adapting to multiple packing forms
05/07/2003CN1416100A Semiconductor device with steady internal circuit operation and less Consumption of current
05/07/2003CN1107957C Semiconductor storage device
05/06/2003USRE38109 Block write circuit and method for wide data path memory device
05/06/2003US6560733 Soft error detection for digital signal processors
05/06/2003US6560728 Layout for semiconductor memory device having a plurality of rows and columns of circuit cells divided into first and second planes that are not simultaneously active
05/06/2003US6560684 Method and apparatus for an energy efficient operation of multiple processors in a memory
05/06/2003US6560668 Method and apparatus for reading write-modified read data in memory device providing synchronous data transfers
05/06/2003US6560164 Semiconductor integrated circuit device with internal clock generating circuit
05/06/2003US6560161 Synchronous flash memory command sequence
05/06/2003US6560156 CAM circuit with radiation resistance
05/06/2003US6560152 Non-volatile memory with temperature-compensated data read
05/06/2003US6560148 Semiconductor memory having mirroring function
05/06/2003US6560146 Dynamic column block selection
05/06/2003US6559694 Timing signal occurrence circuit
05/02/2003EP1306849A2 Devices and methods for controlling active termination resistors in a memory system
05/02/2003EP1305804A1 Synchronous flash memory with status burst output
05/02/2003EP1305803A2 Integrated circuit with a temperature sensor
05/02/2003EP1029326B1 Programmable access protection in a flash memory device
05/01/2003WO2003036850A1 Phase adjustment apparatus and method for a memory device signaling system
05/01/2003WO2003036652A1 Using transfer bits during data transfer from non-volatile to volatile memories
05/01/2003WO2003036445A1 Timing calibration apparatus and method for a memory device signaling system
05/01/2003WO2003009301A9 Storage device
05/01/2003WO2002073618A3 Memory sense amplifier for a semiconductor memory device
05/01/2003US20030084370 Circuit and method for masking a dormant memory cell
05/01/2003US20030084267 Device for accessing registered circuit units
05/01/2003US20030084234 Transparent SDRAM in an embedded environment
05/01/2003US20030084233 System adapted to receive multiple memory types, and method for determining a type of memory present
05/01/2003US20030084230 Using transfer bits during data transfer from non-volatile to volatile memories
05/01/2003US20030081491 Semiconductor memory device with reduced power consumption
05/01/2003US20030081490 Semiconductor memory device allowing high density structure or high performance
05/01/2003US20030081487 Semiconductor memory device
05/01/2003US20030081486 Semiconductor device
05/01/2003US20030081484 Semiconductor device having temperature detecting function, testing method, and refresh control method of semiconductor storage device having temperature detecting function
05/01/2003US20030081483 Dram refresh command operation
05/01/2003US20030081479 Semiconductor memory device
05/01/2003US20030081476 Balanced sense amplifier control for open digit line architecture memory devices
05/01/2003US20030081474 Circuit and method for multiple match detection in content addressable memories
05/01/2003US20030081473 System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal
05/01/2003US20030081472 System and method for skew compensating a clock signal and for capturing a digital signal using the skew compensated clock signal
05/01/2003US20030081471 Semiconductor device with flexible redundancy system
05/01/2003US20030081470 Apparatus for generating memory-internal command signals from a memory operation command
05/01/2003US20030081468 Method and device for backing up data in a memory module and memory module
05/01/2003US20030081461 Semiconductor device
05/01/2003US20030081447 Method and configuration to allow a lower wordline boosted voltage operation while increasing a sensing signal with access transistor threshold voltage
05/01/2003US20030081443 Semiconductor memory device adaptable to various types of packages
05/01/2003US20030080795 Semiconductor device
05/01/2003US20030080794 Device and method for clock generation
05/01/2003US20030080787 Semiconductor device
05/01/2003US20030080780 Output circuit
04/2003
04/30/2003CN1414564A Semiconductor memory capable of implemention high density or high performance
04/30/2003CN1414562A Semiconductor storing device
04/30/2003CN1414561A 输出电路 Output circuit
04/30/2003CN1414557A Decode conversion device for supporting complex storage chip and method and its application system
04/30/2003CN1107379C 输出缓冲电路 The output buffer circuit
04/30/2003CN1107337C Current detection type read amplifier
04/30/2003CN1107323C Sense amplifier circuit of nonvolatile semiconductor memory device
04/30/2003CN1107320C Semiconductor storage device and electronic equipment using the same
04/29/2003US6557090 Column address path circuit and method for memory devices having a burst access mode
04/29/2003US6556725 Data processing device and data order converting method
04/29/2003US6556508 Integrated circuit memory device having interleaved read and program capabilities and methods of operating same
04/29/2003US6556507 High-speed cycle clock-synchrounous memory device
04/29/2003US6556506 Memory access methods and devices for use with random access memories
04/29/2003US6556505 Clock phase adjustment method, and integrated circuit and design method therefor