Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
07/2003
07/08/2003US6590421 Semiconductor device and method of outputting data therein
07/08/2003US6590237 Layout structure for dynamic random access memory
07/08/2003US6589187 Prioritized dynamic memory allocation of arrhythmia episode detail collection
07/03/2003WO2003054887A1 A programmable conductor random access memory and a method for writing thereto
07/03/2003US20030126392 A method of controlling page mode access
07/03/2003US20030126386 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
07/03/2003US20030126385 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
07/03/2003US20030126384 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure
07/03/2003US20030126382 Memory, processor system and method for performing write operations on a memory region
07/03/2003US20030126378 Array of synchronized memory modules
07/03/2003US20030126356 Memory system having synchronous-link DRAM (SLDRAM) devices and controller
07/03/2003US20030123597 Clock synchronization device
07/03/2003US20030123320 Synchronous dynamic random access memory device
07/03/2003US20030123319 Synchronous memory device with reduced address pins
07/03/2003US20030123318 Semiconductor memory device with high-speed operation and methods of using and designing thereof
07/03/2003US20030123317 Semiconductor memory device having write column select gate
07/03/2003US20030123313 Semiconductor memory device equipped with dummy cells
07/03/2003US20030123312 Sense amplifier for reduction of access device leakage
07/03/2003US20030123311 Bitline precharge circuit and method in semiconductor memory device
07/03/2003US20030123310 Semiconductor memory device having write column select gate
07/03/2003US20030123306 Memory device
07/03/2003US20030123305 Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof
07/03/2003US20030123303 Non-volatile semiconductor memory device and method of driving the same
07/03/2003US20030123298 Data access method of semiconductor memory device and semiconductor memory device
07/03/2003US20030123297 Fast cycle RAM having improved data write operation
07/03/2003US20030123287 Non-volatile memory control
07/03/2003US20030123278 Flexible multibanking interface for embedded memory applications
07/03/2003US20030122696 Predictive timing calibration for memory devices
07/03/2003US20030122599 Clock synchronization device
07/03/2003US20030122575 Circuit board configured to provide multiple interfaces
07/02/2003EP1324491A1 Timer circuit and semiconductor memory incorporating the timer circuit
07/02/2003EP1324347A1 A circuit for controlling a reference node in a sense amplifier
07/02/2003EP1324346A1 Memory device
07/02/2003EP1324345A1 Single supply voltage, nonvolatile memory device with cascoded column decoding
07/02/2003EP1324344A1 Sense amplifier structure for multilevel non-volatile memory devices and corresponding reading method
07/02/2003EP1324341A1 Data access method of semiconductor memory device needing refresh operation and semiconductor memory device thereof
07/02/2003EP1324340A1 Static RAM with flash-clear function
07/02/2003EP1054772B1 Memory expansion circuit for ink jet print head identification circuit
07/02/2003CN1427347A Apparatus and method for checking NV fuse, correspondent computer program product and readable storage medium
07/02/2003CN1113365C Method and circuit for realizing operation of reading, correcting and writing data and semiconductor storage thereof
07/02/2003CN1113362C Synchronous semiconductor storage unit of reducing consumption current of input buffer circuit thereof
07/01/2003US6587936 Multi-bank memory access method and apparatus
07/01/2003US6587934 Memory controller and data processing system
07/01/2003US6587917 Memory architecture for supporting concurrent access of different types
07/01/2003US6587914 Non-volatile memory capable of autonomously executing a program
07/01/2003US6587913 Interleaved memory device for burst type access in synchronous read mode with the two semi-arrays independently readable in random access asynchronous mode
07/01/2003US6587896 Impedance matching device for high speed memory bus
07/01/2003US6587892 Integrated circuit memory devices having multiple data communication connections
07/01/2003US6587804 Method and apparatus providing improved data path calibration for memory devices
07/01/2003US6587395 System to set burst mode in a device
07/01/2003US6587392 Fast accessible dynamic type semiconductor memory device
07/01/2003US6587391 Semiconductor memory device for controlling memory banks
07/01/2003US6587390 Memory controller for handling data transfers which exceed the page width of DDR SDRAM devices
07/01/2003US6587389 DRAM refresh command operation
07/01/2003US6587388 Method and apparatus for reducing write operation time in dynamic random access memories
07/01/2003US6587385 Clock synchronous semiconductor memory device having a reduced access time
07/01/2003US6587379 Electronic device with locally reduced effects on analog signals
07/01/2003US6587374 Serial storage device
07/01/2003US6587367 Dummy cell structure for 1T1C FeRAM cell array
07/01/2003US6587363 High speed data bus
07/01/2003US6586979 Method for noise and power reduction for digital delay lines
06/2003
06/26/2003WO2003005283A3 Multilayer combined liquid crystal optical memory systems with means for recording and reading information
06/26/2003US20030120895 Memory controller for synchronous burst transfers
06/26/2003US20030120893 Memory having increased data-transfer speed and related systems and methods
06/26/2003US20030120891 Device and method for associating information concerning memory cells of a memory with an external memory
06/26/2003US20030120861 Multi-bank scheduling to improve performance on tree accesses in a DRAM based random access memory subsystem
06/26/2003US20030120859 Ferroelectric memory device and method of reading a ferroelectric memory
06/26/2003US20030120843 Output data path capable of multiple data rates
06/26/2003US20030120604 Reproducing apparatus and reproducing method
06/26/2003US20030117887 Fast cycle RAM and data readout method therefor
06/26/2003US20030117885 Semiconductor memory device
06/26/2003US20030117884 Clock-synchronous semiconductor memory device
06/26/2003US20030117883 Apparatus for pipe latch control circuit in synchronous memory device
06/26/2003US20030117882 Semiconductor memory device
06/26/2003US20030117881 Multi-mode synchronouos memory device and method of operating and testing same
06/26/2003US20030117880 Pseudo-static single-ended cache cell
06/26/2003US20030117878 Semiconductor memory and method for bit and/or byte write operation
06/26/2003US20030117876 Methods and systems for reducing heat flux in memory systems
06/26/2003US20030117875 Power-up signal generator for semiconductor memory devices
06/26/2003US20030117874 Semiconductor memory device capable of preventing coupling noise between adjacent bit lines in different columns
06/26/2003US20030117873 Hysteresis reduced sense amplifier and method of operation
06/26/2003US20030117870 Semiconductor memory and output signal control method and circuit in semiconductor memory
06/26/2003US20030117866 Recessed magnetic storage element and method of formation
06/26/2003US20030117864 Phase adjustment apparatus and method for a memory device signaling system
06/26/2003US20030117863 Current reducing device in sense amplifier over driver scheme of semiconductor memory chips and its method
06/26/2003US20030117861 NROM NOR array
06/26/2003US20030117859 Active leakage control in single-ended full-swing caches
06/26/2003US20030117857 Voltage generator for semiconductor memory device
06/26/2003US20030117856 Memory devices with page buffer having dual registers and method of using the same
06/26/2003US20030117850 Gapless programming for a NAND type flash memory
06/26/2003US20030117846 Semiconductor memory system with a data copying function and a data copy method for the same
06/26/2003US20030117842 Semiconductor device
06/26/2003US20030117832 Semiconductor memory device having two-transistor, one-capacitor type memory cells of high data holding characteristic
06/26/2003US20030117831 Programmable conductor random access memory and a method for writing thereto
06/26/2003US20030117829 Circuit device having a fuse
06/26/2003US20030117827 Semiconductor memory device and write/readout controlling method error correction code decoding device
06/26/2003US20030117182 Sense amplifier and electronic apparatus using the same
06/25/2003EP1321887A1 Method and device for verification of NV-Fuses and corresponding software product and corresponding computer readable memory
06/25/2003EP1320891A2 Sense amplifier layout
06/25/2003EP0951682B1 IO-AND MEMORY BUS SYSTEM FOR DFPs AND UNITS WITH TWO-OR MULTI- DIMENSIONALLY PROGRAMMABLE CELL STRUCTURES