Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2001
11/27/2001US6324121 Electrically alterable non-volatile memory with n-bits per cell
11/27/2001US6324120 Memory device having a variable data output length
11/27/2001US6324119 Data input circuit of semiconductor memory device
11/27/2001US6324118 Synchronous semiconductor memory device having improved operational frequency margin at data input/output
11/27/2001US6324116 Merged semiconductor device having DRAM and SRAM and data transferring method using the semiconductor device
11/27/2001US6324115 Semiconductor memory device with burst mode access
11/27/2001US6324114 Semiconductor memory device using a plurality of semiconductor memory chips mounted in one system and a semiconductor memory system using a plurality of semiconductor memory devices
11/27/2001US6324113 Semiconductor integrated circuit and method of controlling same
11/27/2001US6324111 Semiconductor memory
11/27/2001US6324106 Semiconductor memory device capable of recovering defective bit and a system having the same semiconductor memory device
11/27/2001US6324104 Semiconductor integrated circuit device
11/27/2001US6324099 2-bit/cell type nonvolatile semiconductor memory
11/27/2001US6324094 Apparatus for reading state of multistate non-volatile memory cells
11/27/2001US6324093 Write-once thin-film memory
11/27/2001US6324092 Random access memory cell
11/27/2001US6324090 Nonvolatile ferroelectric memory device
11/27/2001US6324088 256 meg dynamic random access memory
11/27/2001US6323799 Device for reading non-volatile memory cells in particular analog flash memory cells
11/27/2001US6323720 Internal voltage generator using anti-fuse
11/27/2001US6323702 Integrated circuit devices having circuits therein for driving large signal line loads
11/27/2001US6323691 Logic circuit
11/27/2001US6323664 Semiconductor memory device capable of accurately testing for defective memory cells at a wafer level
11/27/2001US6323504 Single-electron memory device using an electron-hole coulomb blockade
11/27/2001US6323088 Dual floating gate programmable read only memory cell structure and method for its fabrication an operation
11/27/2001US6322653 Method for joining spiral wound pipes
11/22/2001WO2001088988A1 Coulomb barrier storage device, comprising a plurality of electron traps, and method for making same
11/22/2001WO2001088924A1 Transparent continuous refresh ram cell architecture
11/22/2001WO2001088923A1 Improved calibration technique for memory devices
11/22/2001US20010044874 Memory system capable of supporting different memory devices and a memory device used therefor
11/22/2001US20010044196 Semiconductor device and method for producing the same
11/22/2001US20010043507 Synchronous semiconductor memory device capable of high speed reading and writing
11/22/2001US20010043506 Random access memory having independent read port and write port and process for writing to and reading from the same
11/22/2001US20010043505 Integrated circuit memory devices that utilize indication signals to increase reliability of reading and writing operations and methods of operating same
11/22/2001US20010043504 Semiconductor memory device and synchronous memory
11/22/2001US20010043503 Method and circuit configuration for read-write mode control of a synchronous memory
11/22/2001US20010043502 Semiconductor memory device capable of efficient memory cell select operation with reduced element count
11/22/2001US20010043500 Semiconductor device
11/22/2001US20010043499 Semiconductor memory device and refreshing method of semiconductor memory device
11/22/2001US20010043494 Memory device with booting circuit capable of pre-booting before wordline selection
11/22/2001US20010043493 Semiconductor memory device, and method of controlling the same
11/22/2001US20010043489 Nonvolatile memory sensing circuit and techniques thereof
11/22/2001US20010043488 Magnetoresistive memory having elevated interference immunity
11/22/2001US20010043486 Asymmetric ram cell
11/22/2001US20010043484 Nonvolatile memory and its driving method
11/22/2001US20010043482 Semiconductor memory device
11/22/2001US20010043253 Ink jet with coiled actuator
11/22/2001US20010043102 Internal clock signal generating circuit permitting rapid phase lock
11/22/2001US20010043100 Integrated circuit device incorporating dll circuit
11/22/2001US20010043099 Input circuit and semiconductor integrated circuti having the input circuit
11/22/2001US20010043097 Sync signal generating circuit provided in semiconductor integrated circuit
11/22/2001US20010043089 Dram sense amplifier for low voltages
11/22/2001US20010043087 Sense amplifying circuit
11/22/2001US20010043078 Test configuration for the functional testing of a semiconductor chip
11/22/2001US20010042893 Semiconductor memory device having multilevel memory cell and method of manufacturing the same
11/22/2001DE10121459A1 Semiconductor device, such as fusible link semiconductor memory device, has fusible link circuit with its fusible link in series with an assessment transistor having a controlled impedance path
11/22/2001DE10111998A1 Schaltungsmodul Circuit module
11/22/2001DE10031229C1 Current-dependent resistive component used as a switch, sensor or memory element has a layer system consisting of two ferromagnetic manganate layers divided by an epitaxially grown insulating material layer
11/22/2001DE10022263A1 Memory sense amplifier circuit, has precharging circuit and two amplifier stages that can be initialized to voltage supply and earth potentials respectively
11/22/2001DE10021776A1 Layout eines Sense-Verstärkers mit beschleunigter Signalauswertung Layout of a sense amplifier with accelerated signal analysis
11/21/2001EP1155462A1 Storage cell arrangement and method for producing the same
11/21/2001EP1155414A1 Electroluminescent multilayer optical information storage medium with integrated readout and composition of matter for use therein
11/21/2001EP1155413A1 Dual threshold voltage sram cell with bit line leakage control
11/21/2001EP1155406A1 Multilayer optical information storage medium based on incoherent signal
11/21/2001EP0960422B1 Method for minimizing the access time for semiconductor memories
11/21/2001EP0929897B1 Dram
11/21/2001CN1323442A Magnetoresistive element and the use thereof as storage element in a storage cell array
11/21/2001CN1323398A Magnetic sensor produced by constriction
11/21/2001CN1323039A Method for operating integrated memory
11/20/2001US6321360 System including a ferroelectric memory
11/20/2001US6321343 Semiconductor memory system comprising synchronous DRAM and controller thereof
11/20/2001US6321316 Method and apparatus for local control signal generation in a memory device
11/20/2001US6321291 Method of measuring the speed of a memory unit in an integrated circuit
11/20/2001US6320818 Semiconductor storage device, and method for generating timing of signal for activating internal circuit thereof
11/20/2001US6320816 Column select latch for SDRAM
11/20/2001US6320814 Semiconductor device
11/20/2001US6320810 Semiconductor memory device allowing reduction in current consumption
11/20/2001US6320809 Low voltage level power-up detection circuit
11/20/2001US6320805 Semiconductor device with external pins
11/20/2001US6320801 Redundancy circuit and redundancy method for semiconductor memory device
11/20/2001US6320799 Semiconductor memory with a decoder circuit having a redundancy relief function
11/20/2001US6320798 Sense amplifier of semiconductor memory device
11/20/2001US6320794 Late-write type semiconductor memory device with multi-channel data output multiplexer
11/20/2001US6320793 Non-volatile memory device
11/20/2001US6320790 Biasing stage for biasing the drain terminal of a nonvolatile memory cell during the read phase
11/20/2001US6320786 Method of controlling multi-state NROM
11/20/2001US6320785 Nonvolatile semiconductor memory device and data writing method therefor
11/20/2001US6320784 Memory cell and method for programming thereof
11/20/2001US6320783 Nonvolatile ferroelectric memory device and circuit for driving the same
11/20/2001US6320782 Semiconductor memory device and various systems mounting them
11/20/2001US6320780 Reduced impact from coupling noise in diagonal bitline architectures
11/20/2001US6320778 Semiconductor memory with built-in cache
11/20/2001US6320777 Dynamic content addressable memory cell
11/20/2001US6320216 Memory device with barrier portions having defined capacitance
11/20/2001US6319800 Static memory cell
11/20/2001US6319731 Method for manufacturing a non-volatile memory device
11/20/2001US6318849 Fluid supply mechanism for multiple fluids to multiple spaced orifices
11/20/2001US6318707 Semiconductor integrated circuit device
11/15/2001WO2001086660A1 Integrated circuit containing sram memory and method of testing same
11/15/2001WO2001086658A1 Memory sense amplifier
11/15/2001WO2001085884A2 Predictive timing calibration for memory devices
1 ... 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 ... 761