Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
02/2002
02/27/2002EP1182666A1 Integrated memory with magnetoresistive memory cells
02/27/2002EP1182665A2 MRAM with an effective noise countermeasure
02/27/2002EP1181694A1 Plateline sensing
02/27/2002EP1181693A1 Magnetic device with a coupling layer and method of manufacturing and operation of such device
02/27/2002EP1181691A1 Read-write amplifier for a dram memory cell and dram memory
02/27/2002EP0815561B1 Optimization circuitry and control for a synchronous memory device preferably with programmable latency period
02/27/2002CN1338075A Dram refresh monitoring and cycle accurate distributed bus arbitration in a multi-procesing enviroment
02/27/2002CN1337718A Storage controlling technology
02/27/2002CN1337716A Magnetic-resistance random access storage device
02/27/2002CN1337715A Integrated storage with storage unit having magnetic resistance storage effect
02/27/2002CN1337714A Integrated storage with storage unit having magnetic-resistance storage effect
02/27/2002CN1337713A Stable magnetic-resistance storage element with magnetic force
02/27/2002CN1337712A Method for stopping electriomigration in magnetic random access storage
02/27/2002CN1337711A Integrated storage with storage unit having magnetic-resistance storage effect and its operation method
02/27/2002CN1337710A Method and apparatus for compensating parasitic current consumption
02/27/2002CN1337709A Generation of reference signal of magnetic random access storage device
02/27/2002CN1337708A Electric current driving device and magnetic-resistance storage
02/27/2002CN1337707A Semiconductor storage apparatus for increasing bus efficiency and storage system
02/27/2002CN1079981C Potential generation circuit
02/26/2002US6351433 Semiconductor memory device employing pipeline operation with reduced power consumption
02/26/2002US6351432 Synchronous semiconductor memory apparatus and input information latch control method thereof
02/26/2002US6351431 Semiconductor memory device
02/26/2002US6351429 Binary to binary-encoded-ternary (BET) decoder using reordered logic
02/26/2002US6351427 Stored write scheme for high speed/wide bandwidth memory devices
02/26/2002US6351426 DRAM having a power supply voltage lowering circuit
02/26/2002US6351423 Semiconductor memory device including sense amplifier circuit differing in drivability between data write mode and data read mode
02/26/2002US6351422 Integrated memory having a differential sense amplifier
02/26/2002US6351421 Data output buffer
02/26/2002US6351416 Current sense amplifier circuit
02/26/2002US6351411 Memory using insulator traps
02/26/2002US6351410 Ferromagnetic tunnel junction random access memory, spin valve random access memory, single ferromagnetic layer random access memory, and memory cell array using the same
02/26/2002US6351409 MRAM write apparatus and method
02/26/2002US6351408 Memory cell configuration
02/26/2002US6351406 Vertically stacked field programmable nonvolatile memory and method of fabrication
02/26/2002US6351179 Semiconductor integrated circuit having active mode and standby mode converters
02/26/2002US6351178 Reference potential generating circuit
02/26/2002US6351176 Pulsing of body voltage for improved MOS integrated circuit performance
02/26/2002US6351169 Internal clock signal generating circuit permitting rapid phase lock
02/26/2002US6351166 Semiconductor device with stable and appropriate data output timing
02/26/2002US6350694 Reducing CMP scratch, dishing and erosion by post CMP etch back method for low-k materials
02/21/2002WO2002015278A2 Multigate semiconductor device and method of fabrication
02/21/2002WO2002015195A2 Method and apparatus for controlling a read valid window of a synchronous memory device
02/21/2002WO2002015194A1 Method and system for hiding refreshes in a dynamic random access memory
02/21/2002WO2002015171A1 Circuit selection of magnetic memory cells and related cell structures
02/21/2002WO2002015019A1 Method and system for using dynamic random access memory as cache memory
02/21/2002WO2001084552A3 Programming of nonvolatile memory cells
02/21/2002WO2001075899A3 Page mode erase in a flash memory array
02/21/2002WO2001069602A3 Ferroelectric memory and method of operating same
02/21/2002US20020023200 Method and apparatus for synchronous data transfers in a memory device with selectable data or address paths
02/21/2002US20020023197 Memory controller and data processing system
02/21/2002US20020023193 Semiconductor memory and address controlling method thereof
02/21/2002US20020023191 Semiconductor memory device and memory system using the same
02/21/2002US20020022322 Triple self-aligned split-gate non-volatile memory device
02/21/2002US20020021616 Method and apparatus for crossing clock domain boundaries
02/21/2002US20020021615 Semiconductor integrated circuit
02/21/2002US20020021613 Semiconductor integrated circuit capable of reducing area occupied by data bus
02/21/2002US20020021612 Dynamic random access memory with low power consumption
02/21/2002US20020021610 Antifuse detection circuit
02/21/2002US20020021609 Semiconductor memory device with concurrent refresh and data access operation
02/21/2002US20020021608 Semiconductor memory device
02/21/2002US20020021602 Semiconductor device allowing external setting of internal power supply voltage generated by a voltage down converter at the time of testing
02/21/2002US20020021591 Plural line buffer type memory LSI
02/21/2002US20020021589 Single electron resistor memory device and method
02/21/2002US20020021588 Read device and read method for semiconductor memory
02/21/2002US20020021581 Source and drain sensing
02/21/2002US20020021580 Integrated semiconductor-magnetic random access memory system
02/21/2002US20020021579 Nonvolatile semiconductor memory device having ferroelectric capacitors
02/21/2002US20020021543 Configuration and method for the low-loss writing of an MRAM
02/21/2002US20020021179 Ring oscillator having variable capacitance circuits for frequency adjustment
02/21/2002US20020021157 Variable delay circuit and semiconductor integrated circuit device
02/21/2002US20020021152 DLL circuit and method of generating timing signals
02/21/2002US20020021147 Sense amplifiers having gain control circuits therein that inhibit signal oscillations
02/21/2002US20020020886 High-performance high-density CMOS sram cell
02/21/2002US20020020885 CMOS SRAM cell with prescribed power-on data state
02/21/2002US20020020865 MRAM with an effective noise countermeasure
02/21/2002US20020020864 Memory cell cofiguration and production method
02/21/2002DE10132777A1 Halbleiterspeichervorrichtung A semiconductor memory device
02/21/2002DE10123879A1 Substratpotential-Erfassungsschaltung und Substratpotential-Erzeugungsschaltung Substrate potential detecting circuit and the substrate potential generating circuit
02/21/2002DE10055242C1 IC switch stage circuit with internal voltage supply has control circuit used for initializing switch stage during power-up
02/21/2002DE10037976A1 Anordnung zum verlustarmen Schreiben eines MRAMs Arrangement for low-loss writing an MRAM
02/20/2002EP1180799A2 Semiconductor memory device and method of manufacturing the same
02/20/2002EP1180770A1 MRAM memory
02/20/2002CN1337068A Ferroelectric memory with perroelectric thin film and method of fabrication
02/20/2002CN1336690A Semiconductor storage device using single slop transistor to transport voltage for selected word line
02/20/2002CN1336667A Circuit device for reading memory unit having ferroelectric capacitor
02/19/2002US6349072 Random access memory device
02/19/2002US6349071 Synchronous semiconductor storage device
02/19/2002US6349070 Packaged integrated circuit synchronous memory device with circuits for compensating clock signals having different loads using phase adjustments
02/19/2002US6349069 Semiconductor memory device
02/19/2002US6349068 Semiconductor memory device capable of reducing power consumption in self-refresh operation
02/19/2002US6349066 Semiconductor storage device having a self-refresh circuit for automatically refreshing memory cell
02/19/2002US6349065 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing
02/19/2002US6349063 Semiconductor memory devices and driving methods
02/19/2002US6349062 Selective erasure of a non-volatile memory cell of a flash memory device
02/19/2002US6349058 Electronic circuit and method for storing configuration and calibration information in a non-volatile memory array
02/19/2002US6349056 Method and structure for efficient data verification operation for non-volatile memories
02/19/2002US6349054 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
02/19/2002US6349053 Spin dependent tunneling memory
02/19/2002US6349051 High speed data bus
02/19/2002US6348822 Semiconductor storage device capable of speeding up an access from a standby state