| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 04/17/2003 | US20030074630 Method for combining refresh operation with parity validation in a DRAM-based content addressable memory (CAM) |
| 04/17/2003 | US20030073251 Plate-through hard mask for MRAM devices |
| 04/17/2003 | US20030072206 Asynchronous hidden refresh of semiconductor memory |
| 04/17/2003 | US20030072203 Semiconductor memory having electrically erasable and programmable semiconductor memory cells |
| 04/17/2003 | US20030072202 Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell |
| 04/17/2003 | US20030072201 Semiconductor memory device having bit line kicker |
| 04/17/2003 | US20030072194 Nonvolatile semiconductor storage device |
| 04/17/2003 | US20030072192 Programming of nonvolatile memory cells |
| 04/17/2003 | US20030072189 Semiconductor device preventing signal delay among wirings |
| 04/17/2003 | US20030072187 Semiconductor storage device conducting a late-write operation and controlling a test read-operation to read data not from a data latch circuit but from a memory core circuit regardless of whether a preceding address and a present address match each other |
| 04/17/2003 | US20030072177 Non-volatile memory with improved sensing and method therefor |
| 04/17/2003 | US20030072174 Method of writing to scalable magnetoresistance random access memory element |
| 04/17/2003 | US20030072172 Noise suppression for open bit line DRAM architectures |
| 04/17/2003 | US20030072109 Magnetoresistive element including smooth spacer interface |
| 04/17/2003 | US20030071875 Ink jet printhead that incorporates through-chip ink flow control |
| 04/17/2003 | US20030071819 Memory device and image processing apparatus using same |
| 04/17/2003 | US20030071679 Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor |
| 04/17/2003 | US20030071670 Semiconductor integrated circuit device |
| 04/17/2003 | US20030071302 Multi-level type nonvolatile semiconductor memory device |
| 04/17/2003 | US20030071012 Method of manufacturing a micro-electromechanical fluid ejecting device |
| 04/16/2003 | EP1302948A1 Memory sense amplifier |
| 04/16/2003 | EP1301928A2 Mram architectures for increased write selectivity |
| 04/16/2003 | EP1301927A1 Method and apparatus for synchronization of row and column access operations |
| 04/16/2003 | EP1019821B1 Method and apparatus for correcting a multilevel cell memory by using interleaving |
| 04/16/2003 | EP0972270B1 A storage apparatus and writing and/or reading methods for use in hierarchical coding |
| 04/16/2003 | CN1411074A Shared bit line cross point storage array |
| 04/16/2003 | CN1411073A Semiconductor storage |
| 04/16/2003 | CN1411071A Semiconductor storage and measuring method thereof |
| 04/16/2003 | CN1411070A Semiconductor storage |
| 04/16/2003 | CN1411069A 半导体装置 Semiconductor device |
| 04/16/2003 | CN1411064A 半导体集成电路装置 The semiconductor integrated circuit device |
| 04/16/2003 | CN1411001A Bit line controlling decoder circuit, semiconductor storage device and data device and data reading method thereof |
| 04/16/2003 | CN1411000A Film magnetic storage of shared storage element between multiple storage locations |
| 04/16/2003 | CN1410999A 半导体存储器 Semiconductor memory |
| 04/16/2003 | CN1106076C Trigger circuit with latch |
| 04/16/2003 | CN1106019C 半导体存储器 Semiconductor memory |
| 04/16/2003 | CN1106018C Dimension programmable fusebanks and method for making same |
| 04/16/2003 | CN1105970C Field programmable gate array with distributed RAM |
| 04/15/2003 | US6550014 Data processing system and image processing system |
| 04/15/2003 | US6549994 Semiconductor memory device capable of performing a write operation 1 or 2 cycles after receiving a write command without a dead cycle |
| 04/15/2003 | US6549484 Semiconductor device |
| 04/15/2003 | US6549481 Power up initialization circuit responding to an input signal |
| 04/15/2003 | US6549480 Semiconductor integrated circuit allowing internal voltage to be measured and controlled externally |
| 04/15/2003 | US6549479 Memory device and method having reduced-power self-refresh mode |
| 04/15/2003 | US6549476 Device and method for using complementary bits in a memory array |
| 04/15/2003 | US6549475 Semiconductor memory device and information device |
| 04/15/2003 | US6549473 Circuital structure for reading data in a non-volatile memory device |
| 04/15/2003 | US6549470 Small signal, low power read data bus driver for integrated circuit devices incorporating memory arrays |
| 04/15/2003 | US6549464 Nonvolatile semiconductor memory device |
| 04/15/2003 | US6549462 Memory cell of nonvolatile semiconductor memory device |
| 04/15/2003 | US6549457 Using multiple status bits per cell for handling power failures during write operations |
| 04/15/2003 | US6549456 Integrated circuit with analog or multilevel storage cells and user-selectable sampling frequency |
| 04/15/2003 | US6549455 Magnetic memory device including storage element exhibiting ferromagnetic tunnel effect |
| 04/15/2003 | US6549454 TMR material having a substantially smooth and continuous ultra-thin magnetic layer |
| 04/15/2003 | US6549453 Method and apparatus for writing operation in SRAM cells employing PFETS pass gates |
| 04/15/2003 | US6549452 Variable width wordline pulses in a memory device |
| 04/15/2003 | US6549451 Memory cell having reduced leakage current |
| 04/15/2003 | US6549450 Method and system for improving the performance on SOI memory arrays in an SRAM architecture system |
| 04/15/2003 | US6549449 Semiconductor device |
| 04/15/2003 | US6549448 FeRAM having adjacent memory cells sharing cell plate and driving method for the same |
| 04/15/2003 | US6549446 Data balancing scheme in solid state storage devices |
| 04/15/2003 | US6549445 Semiconductor memory device including plurality of global data lines in parallel arrangement with low parasitic capacitance, and fabrication method thereof |
| 04/15/2003 | US6549444 Memory device with prefetched data ordering distributed in prefetched data path logic, circuit, and method of ordering prefetched data |
| 04/15/2003 | US6549443 Single event upset resistant semiconductor circuit element |
| 04/15/2003 | US6549047 Variable delay circuit and semiconductor integrated circuit device |
| 04/15/2003 | US6548903 Semiconductor integrated circuit |
| 04/15/2003 | US6548885 Semiconductor integrated circuit device and process for manufacturing the same |
| 04/15/2003 | US6548884 Semiconductor device |
| 04/15/2003 | US6548849 Magnetic yoke structures in MRAM devices to reduce programming power consumption and a method to make the same |
| 04/15/2003 | US6548843 Ferroelectric storage read-write memory |
| 04/15/2003 | US6547364 Printing cartridge with an integrated circuit device |
| 04/10/2003 | WO2003030177A1 Memory with high performance unit architecture |
| 04/10/2003 | WO2003030176A2 Memory array employing integral isolation transistors |
| 04/10/2003 | WO2003030138A1 Display memory, driver circuit, display, and cellular information apparatus |
| 04/10/2003 | WO2003029984A1 Apparatus and methods for dedicated command port in memory controllers |
| 04/10/2003 | WO2003029951A2 Non-volatile memory control |
| 04/10/2003 | WO2003029012A1 A keyboard |
| 04/10/2003 | WO2002061751A3 Reference voltage generator for mram and method |
| 04/10/2003 | WO2002059973A3 Serial mram device |
| 04/10/2003 | US20030070126 Built-in self-testing of multilevel signal interfaces |
| 04/10/2003 | US20030070049 Memory control method, memory control circuit using the control method, and integrated circuit device with the memory control circuit |
| 04/10/2003 | US20030070038 Memory interface circuit |
| 04/10/2003 | US20030070037 Memory device command signal generator |
| 04/10/2003 | US20030069715 Systems and methods for forming data storage devices |
| 04/10/2003 | US20030067834 Switching circuit capable of improving memory write timing and method thereof |
| 04/10/2003 | US20030067832 Access control system for multi-banked DRAM memory |
| 04/10/2003 | US20030067830 Method and apparatus for temperature adaptive refresh in 1T-SRAM compatible memory using the subthreshold characteristics of MOSFET transistors |
| 04/10/2003 | US20030067829 Semiconductor memory having dual port cell supporting hidden refresh |
| 04/10/2003 | US20030067828 Memory device and computer system including circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
| 04/10/2003 | US20030067827 A circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
| 04/10/2003 | US20030067826 Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
| 04/10/2003 | US20030067825 Semiconductor memory device |
| 04/10/2003 | US20030067824 Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
| 04/10/2003 | US20030067821 Digital memory circuit having a plurality of memory areas |
| 04/10/2003 | US20030067820 Digital memory circuit having a plurality of segmented memory areas |
| 04/10/2003 | US20030067819 Semiconductor memory device |
| 04/10/2003 | US20030067817 Distributed write data drivers for burst access memories |
| 04/10/2003 | US20030067813 Semiconductor memory device |
| 04/10/2003 | US20030067812 Clock synchronous semiconductor memory device |
| 04/10/2003 | US20030067802 Method for modifying switching field characteristics of magnetic tunnel junctions |