| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 05/06/2004 | US20040087134 Method for writing to the magnetoresistive memory cells of an integrated magnetoresistive semiconductor memory |
| 05/06/2004 | US20040087087 Twin NAND device structure, array operations and fabrication method |
| 05/06/2004 | US20040087038 Bilayer cmp process to improve surface roughness of magnetic stack in mram technology |
| 05/06/2004 | US20040085850 Semiconductor memory capable of performing high-speed processing |
| 05/06/2004 | US20040085845 Semiconductor device and semiconductor memory device provided with internal current setting adjustment circuit |
| 05/06/2004 | US20040085844 Semiconductor memory device with high-speed sense amplifier |
| 05/06/2004 | US20040085839 Semiconductor device |
| 05/06/2004 | US20040085837 Mode entrance control circuit and mode entering method in semiconductor memory device |
| 05/06/2004 | US20040085836 Memory device in semiconductor for enhancing ability of test |
| 05/06/2004 | US20040085835 Semiconductor memory device with reduced data access time |
| 05/06/2004 | US20040085832 Semiconductor memory device and method of controlling the same |
| 05/06/2004 | US20040085829 Structure and method for transverse field enhancement |
| 05/06/2004 | US20040085827 Nonvolatile solid-state magnetic memory, method for controlling coercive force of nonvolatile solid-state magnetic memory, and method for recording in nonvolatile solid-state magnetic memory |
| 05/06/2004 | US20040085826 Semiconductor integrated circuit with memory redundancy circuit |
| 05/06/2004 | US20040085820 Semiconductor memory device achieving fast random access |
| 05/06/2004 | US20040085814 Nonvolatile semiconductor memory device |
| 05/06/2004 | US20040085813 Multiple level RAM device |
| 05/06/2004 | US20040085812 Method and apparatus for programming and testing a non-volatile memory cell for storing multibit states |
| 05/06/2004 | US20040085811 Method for recording in a nonvolatile solid-state magnetic memory |
| 05/06/2004 | US20040085810 Magnetic tunnel junction memory cell architecture |
| 05/06/2004 | US20040085809 Magnetic memory device having magnetic circuit and method of manufacture thereof |
| 05/06/2004 | US20040085808 Magnetic memory device and methods for making same |
| 05/06/2004 | US20040085807 Magnetic memory and method for driving the same, and magnetic memory device using the same |
| 05/06/2004 | US20040085806 One-time programming multiple-level memory cells |
| 05/06/2004 | US20040085804 Synchronous controlled, self-timed local SRAM block |
| 05/06/2004 | US20040085803 Magnetic thin film element, memory element using the same, and methd for recording and reproducing using the memory element |
| 05/06/2004 | US20040085800 Semiconductor integrated circuit device |
| 05/06/2004 | US20040085799 Semiconductor memory device with memory cell array divided into blocks |
| 05/06/2004 | US20040085798 Nonvolatile data storage circuit using ferroelectric capacitors |
| 05/06/2004 | US20040085794 Memory cell sensing system and method |
| 05/06/2004 | US20040085690 Semiconductor integrated circuit |
| 05/06/2004 | US20040085687 Ferromagnetic layer for magnetoresistive element |
| 05/06/2004 | US20040085681 Magnetoresistance element, magnetic memory, and magnetic head |
| 05/06/2004 | US20040085403 Ink jet printhead chip with active and passive nozzle chamber structures |
| 05/06/2004 | US20040085402 Micro-electromechanical valve assembly |
| 05/06/2004 | US20040085107 Register controlled delay locked loop having acceleration mode |
| 05/06/2004 | US20040084751 Inductive storage capacitor |
| 05/06/2004 | US20040084743 Device allows control of its semiconductor cell via a diodic layer |
| 05/06/2004 | US20040084714 Semiconductor memory device |
| 05/06/2004 | US20040084702 Magnetic memories with bit lines and digit lines that intersect at oblique angles and fabrication methods thereof |
| 05/06/2004 | US20040084676 Semiconductor memory device using vertical-channel transistors |
| 05/06/2004 | US20040084670 Stacked organic memory devices and methods of operating and fabricating |
| 05/06/2004 | US20040084537 Method and apparatus for data acquisition |
| 05/06/2004 | US20040084405 Method of fabricating an inkjet printhead chip for use with a pulsating pressure ink supply |
| 05/06/2004 | US20040084400 Patterning metal stack layers of magnetic switching device, utilizing a bilayer metal hardmask |
| 05/06/2004 | EP1416530A2 Treatment of a tunnel barrier layer |
| 05/06/2004 | EP1416504A2 Ferromagnetic layer for magnetoresistive element |
| 05/06/2004 | EP1416497A2 One time programmable multibit memory cells |
| 05/06/2004 | EP1416496A1 Multiple level ram device |
| 05/06/2004 | EP1416495A1 Treatment of a tunnel barrier layer |
| 05/06/2004 | EP1416494A2 Semiconductor memory capable of performing high-speed processing |
| 05/06/2004 | EP1415305A2 Duty-cycle-efficient sram cell test |
| 05/06/2004 | EP1415304A2 Memory device having different burst order addressing for read and write operations |
| 05/06/2004 | EP1415303A2 Sense amplifier and architecture for open digit arrays |
| 05/06/2004 | DE10246738B4 Leseverstärker mit unabhängiger Rückschreibefähigkeit für ferroelektrische Direktzugriffsspeicher Sense amplifier with independent write-back capability for ferroelectric random access memory |
| 05/06/2004 | DE10208715B4 Latenz-Zeitschalter für ein S-DRAM Latency timer for an S-DRAM |
| 05/05/2004 | CN1494719A Non-Destructive readout |
| 05/05/2004 | CN1494157A Semiconductor storage device and its controlling method |
| 05/05/2004 | CN1494156A Operating control according to temp change of integrated circuit |
| 05/05/2004 | CN1494087A Control grid of bimetal oxide-nitride-oxide semiconductor and word line voltage boost design |
| 05/05/2004 | CN1494084A Digit line precharging circuit of semiconductor storage device |
| 05/05/2004 | CN1494083A Low-watt consumption semiconductor storage device on non-data access |
| 05/05/2004 | CN1148621C Integrated circuit and integrated circuit memory capable of rapid on chip voltage generation |
| 05/04/2004 | US6732322 Encoding method and memory device |
| 05/04/2004 | US6732305 Test interface for verification of high speed embedded synchronous dynamic random access memory (SDRAM) circuitry |
| 05/04/2004 | US6731567 DDR memory and storage method |
| 05/04/2004 | US6731566 Single ended simplex dual port memory cell |
| 05/04/2004 | US6731563 Data backup device and step-up/step-down power supply |
| 05/04/2004 | US6731561 Semiconductor memory and method of testing semiconductor memory |
| 05/04/2004 | US6731560 Refresh apparatus for semiconductor memory device, and refresh method thereof |
| 05/04/2004 | US6731559 Synchronous semiconductor memory device |
| 05/04/2004 | US6731558 Semiconductor device |
| 05/04/2004 | US6731556 DRAM with bias sensing |
| 05/04/2004 | US6731549 Semiconductor memory device |
| 05/04/2004 | US6731547 Semiconductor integrated circuit including a plurality of macros that can be operated although their operational voltages are different from each other |
| 05/04/2004 | US6731546 SRAM power-up system and method |
| 05/04/2004 | US6731535 Nonvolatile semiconductor memory device |
| 05/04/2004 | US6731534 Bit line tracking scheme with cell current variation and substrate noise consideration for SRAM devices |
| 05/04/2004 | US6731533 Loadless 4T SRAM cell with PMOS drivers |
| 05/04/2004 | US6731530 Shadow RAM cell using a ferroelectric capacitor |
| 05/04/2004 | US6731529 Variable capacitances for memory cells within a cell group |
| 05/04/2004 | US6731528 Dual write cycle programmable conductor memory system and method of operation |
| 05/04/2004 | US6731149 Synchronizing circuit for generating a signal synchronizing with a clock signal |
| 05/04/2004 | US6731005 Semiconductor device including fuses for relieving defective areas |
| 05/04/2004 | US6730949 Magnetoresistance effect device |
| 05/04/2004 | US6730395 Magnetic tunnel junction using nanoparticle monolayers and applications therefor |
| 04/29/2004 | WO2004036587A1 Memory cell for a dynamic storing device |
| 04/29/2004 | WO2004036554A2 Phase change media for high density data storage |
| 04/29/2004 | WO2004036430A1 Information processing device using variable operation frequency |
| 04/29/2004 | WO2004015711A3 Low leakage asymmetric sram cell devices |
| 04/29/2004 | WO2003094201A3 High voltage row and column driver for programmable resistance memory |
| 04/29/2004 | US20040083329 Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system |
| 04/29/2004 | US20040083328 Method for operating an MRAM semiconductor memory configuration |
| 04/29/2004 | US20040083314 Selector with group identification terminals |
| 04/29/2004 | US20040082201 Ultra-violet treatment of a tunnel barrier layer through an overlayer a tunnel junction device |
| 04/29/2004 | US20040082082 Methods of increasing write selectivity in an mram |
| 04/29/2004 | US20040082081 Ultra-violet treatment for a tunnel barrier layer in a tunnel junction device |
| 04/29/2004 | US20040081841 Using a magneto resistive effect element |
| 04/29/2004 | US20040081013 Latency control circuit and method of latency control |
| 04/29/2004 | US20040081012 Semiconductor memory device invalidating improper control command |