| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 06/03/2004 | US20040105304 Thin film magnetic memory device with memory cells including a tunnel magnetic resistive element |
| 06/03/2004 | US20040105303 Magnetic random access memory |
| 06/03/2004 | US20040105302 Data holding device and data holding method |
| 06/03/2004 | US20040105300 Reduced integrated circuit chip leakage and method of reducing leakage |
| 06/03/2004 | US20040105299 Storage array such as a SRAM with reduced power requirements |
| 06/03/2004 | US20040105297 Memory device comprising hysteretic capacitance means |
| 06/03/2004 | US20040105296 Ferroelectric memory |
| 06/03/2004 | US20040105295 Semiconductor memory and writing method and reading method for the same |
| 06/03/2004 | US20040105293 Reducing effects of noise coupling in integrated circuits with memory arrays |
| 06/03/2004 | US20040105292 Memory system and data transmission method |
| 06/03/2004 | US20040104972 Fluid ejection device that incorporates covering formations for actuators of the fluid ejection device |
| 06/03/2004 | US20040104914 Field memory having a line memory in a memory cell array |
| 06/03/2004 | US20040104752 System and method for expanding a pulse width |
| 06/03/2004 | US20040104400 Dynamic data restore in thyristor-based memory device |
| 06/03/2004 | DE10353852A1 Externally clocked programming circuit and process for an electrical fuse has synchronous or asynchronous selection for fuse burning especially in drams |
| 06/03/2004 | DE10353371A1 Verfahren und Implementierung eines Selbstauffrischmerkmals auf einem Chip Procedures and implementation of a Selbstauffrischmerkmals on a chip |
| 06/03/2004 | DE10352710A1 Flash-Speicherbauelement, Verifizierverfahren und Programmiereinheit hierfür Flash memory device, Verifizierverfahren and programming unit for this |
| 06/03/2004 | DE10350339A1 Halbleiterspeichervorrichtung mit reduzierter Datenzugriffszeit A semiconductor memory device with a reduced access time to data |
| 06/03/2004 | DE10346961A1 Spannungsregler mit verteiltem Ausgangstransistor Voltage regulator with distributed output transistor |
| 06/03/2004 | DE10334821A1 Halbleiterspeicherschaltung mit normalem Betriebsmodus und Burn-in-Testmodus A semiconductor memory circuit having a normal operating mode and the burn-in test mode |
| 06/02/2004 | EP1424697A2 Common bit/common source line high density 1T1R resistive-ram array |
| 06/02/2004 | EP1423861A1 Magnetoresistive device and electronic device |
| 06/02/2004 | EP1423856A1 Non-volatile memory device |
| 06/02/2004 | EP1423855A1 Mram with midpoint generator reference |
| 06/02/2004 | EP1266379B1 Method and apparatus for an improved reset and power-on arrangement for a dram generator controller |
| 06/02/2004 | EP1002319B1 A ferroelectric data processing device |
| 06/02/2004 | EP0758499B1 Method and apparatus for providing an ultra low power regulated negative charge pump |
| 06/02/2004 | CN1502136A Intrgrated magnetoresistive semiconductor memory arrangement |
| 06/02/2004 | CN1502109A Semiconductor storage device |
| 06/02/2004 | CN1502108A Method and apparatus for operating a semiconductor memory at double data transfer rate |
| 06/02/2004 | CN1501523A Magnetic tunnel junction device and method for fabricating the same |
| 06/02/2004 | CN1501458A Ultra-violet treatment of a tunnel barrier layer through an overlayer a tunnel junction device |
| 06/02/2004 | CN1501407A Semiconductor storing device |
| 06/02/2004 | CN1501406A Semiconductor memory device |
| 06/02/2004 | CN1501405A Nonvolatile memory device with sense amplifier securing reading margin |
| 06/02/2004 | CN1501404A Non volatile memory |
| 06/02/2004 | CN1501403A Semiconductor memory circuit |
| 06/02/2004 | CN1501402A Non-volatile memory device achieving fast data reading by reducing data line charging period |
| 06/02/2004 | CN1501401A Thin film magnetic memory device provided with magnetic tunnel junctions |
| 06/02/2004 | CN1152431C Semiconductor integrated circuit with DRAM |
| 06/01/2004 | US6745349 CD-ROM decoder and method for temporarily storing and retrieving digital data |
| 06/01/2004 | US6745316 Data processing system |
| 06/01/2004 | US6745279 Memory controller |
| 06/01/2004 | US6744691 Semiconductor memory module |
| 06/01/2004 | US6744690 Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (DRAM) arrays and embedded DRAM |
| 06/01/2004 | US6744689 Semiconductor memory device having a stable internal power supply voltage |
| 06/01/2004 | US6744687 Semiconductor memory device with mode register and method for controlling deep power down mode therein |
| 06/01/2004 | US6744685 Semiconductor device, method for refreshing the same, and electronic equipment |
| 06/01/2004 | US6744684 Semiconductor memory device with simple refresh control |
| 06/01/2004 | US6744680 Semiconductor device realized by using partial SOI technology |
| 06/01/2004 | US6744679 Semiconductor memory device |
| 06/01/2004 | US6744678 Semiconductor memory device capable of masking undesired column access signal |
| 06/01/2004 | US6744676 DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same |
| 06/01/2004 | US6744673 Feedback biasing integrated circuit |
| 06/01/2004 | US6744670 Non-volatile semiconductor memory device |
| 06/01/2004 | US6744667 Bit line control decoder circuit, virtual ground type nonvolatile semiconductor storage device provided with the decoder circuit, and data read method of virtual ground type nonvolatile semiconductor storage device |
| 06/01/2004 | US6744663 Circuit and method for reading a toggle memory cell |
| 06/01/2004 | US6744662 Magnetoresistive memory (MRAM) |
| 06/01/2004 | US6744661 Radiation-hardened static memory cell using isolation technology |
| 06/01/2004 | US6744659 Source-biased memory cell array |
| 06/01/2004 | US6744658 Semiconductor memory device capable of holding write data for long time |
| 06/01/2004 | US6744657 Read only data bus and write only data bus forming in different layer metals |
| 06/01/2004 | US6744651 Local thermal enhancement of magnetic memory cell during programming |
| 06/01/2004 | US6744305 Power supply circuit having value of output voltage adjusted |
| 06/01/2004 | US6744302 Voltage generator circuit for use in a semiconductor device |
| 06/01/2004 | US6744298 Semiconductor device |
| 06/01/2004 | US6744284 Receiver circuit of semiconductor integrated circuit |
| 06/01/2004 | US6744273 Semiconductor device capable of reducing noise to signal line |
| 06/01/2004 | US6744087 Non-volatile memory using ferroelectric gate field-effect transistors |
| 06/01/2004 | US6744086 Current switched magnetoresistive memory cell |
| 06/01/2004 | US6743647 Semiconductor memory device manufacturing method |
| 06/01/2004 | US6743642 Bilayer CMP process to improve surface roughness of magnetic stack in MRAM technology |
| 06/01/2004 | US6743641 Method of improving surface planarity prior to MRAM bit material deposition |
| 06/01/2004 | CA2185333C Method and apparatus for providing an ultra low power regulated negative charge pump |
| 05/27/2004 | WO2004044919A1 Storage circuit having single-ended write circuitry |
| 05/27/2004 | WO2004044918A1 Semiconductor storage device |
| 05/27/2004 | WO2004044916A2 Low standby power sram |
| 05/27/2004 | WO2004044757A2 Method and apparatus for data acquisition |
| 05/27/2004 | WO2004023262A3 One button external backup |
| 05/27/2004 | US20040103258 Dynamic optimization of latency and bandwidth on DRAM interfaces |
| 05/27/2004 | US20040103243 Apparatus and methods for dedicated command port in memory controllers |
| 05/27/2004 | US20040101979 Ferroelectric resistor non-volatile memory |
| 05/27/2004 | US20040101702 Magnetic tunnel junction device and method for fabricating the same |
| 05/27/2004 | US20040100856 Semiconductor memory device adaptive for use circumstance |
| 05/27/2004 | US20040100855 Magneto-resistance effect element, magnetic memory and magnetic head |
| 05/27/2004 | US20040100851 DRAM-based separate I/O memory solution for communication applications |
| 05/27/2004 | US20040100847 Partial array self-refresh |
| 05/27/2004 | US20040100846 Method and apparatus for establishing a reference voltage in a memory |
| 05/27/2004 | US20040100845 Technique for sensing the state of a magneto-resistive random access memory |
| 05/27/2004 | US20040100837 On-die termination circuit and method for reducing on-chip DC current, and memory system including memory device having the same |
| 05/27/2004 | US20040100836 Magnetic memory configuration |
| 05/27/2004 | US20040100835 Magnetic memory cell and magnetic random access memory using the same |
| 05/27/2004 | US20040100832 Magnetic memory device |
| 05/27/2004 | US20040100820 Electron spin mechanisms for inducing magnetic-polarization reversal |
| 05/27/2004 | US20040100819 Memory device capable of stable data writing |
| 05/27/2004 | US20040100818 Magnetic random access memory |
| 05/27/2004 | US20040100817 Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics |
| 05/27/2004 | US20040100816 SRAM cell with horizontal merged devices |
| 05/27/2004 | US20040100815 SRAM bit-line reduction |
| 05/27/2004 | US20040100814 Common bit/common source line high density 1T1R R-RAM array |