Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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07/06/2004 | US6760264 Apparatus and structure for rapid enablement |
07/06/2004 | US6760263 Method and device for controlling data latch time |
07/06/2004 | US6760262 Charge pump circuit adjustable in response to an external voltage source |
07/06/2004 | US6760261 DQS postamble noise suppression by forcing a minimum pulse length |
07/06/2004 | US6760257 Programming a flash memory cell |
07/06/2004 | US6760255 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks |
07/06/2004 | US6760251 Memory device reading data according to difference in electrical resistance between selected memory cell and reference cell |
07/06/2004 | US6760250 Magnetic random access memory |
07/06/2004 | US6760249 Content addressable memory device capable of comparing data bit with storage data bit |
07/06/2004 | US6760248 Voltage regulator with distributed output transistor |
07/06/2004 | US6760247 Methods and apparatus for flexible memory access |
07/06/2004 | US6760246 Method of writing ferroelectric field effect transistor |
07/06/2004 | US6760245 Molecular wire crossbar flash memory |
07/06/2004 | US6760244 Magnetic memory device including storage elements exhibiting a ferromagnetic tunnel effect |
07/06/2004 | US6760243 Distributed, highly configurable modular predecoding |
07/06/2004 | US6760201 Magnetic tunnel element and its manufacturing method, thin-film magnetic head, magnetic memory and magnetic sensor |
07/06/2004 | US6759896 Semiconductor integrated circuit and semiconductor memory having a voltage step-down circuit stepping external power supply voltage down to internal power supply voltage |
07/06/2004 | US6759895 Data latch circuit having anti-fuse elements |
07/06/2004 | US6759884 Semiconductor integrated circuit, method of controlling the same, and variable delay circuit |
07/06/2004 | US6759866 Semiconductor integrated circuit and a testing method thereof |
07/06/2004 | US6759699 Storage element and SRAM cell structures using vertical FETS controlled by adjacent junction bias through shallow trench isolation |
07/06/2004 | US6759290 Metal/polysilicon oxide nitride oxide silicon (monos) memory arrays with reduced bit line resistance |
07/06/2004 | US6759280 Memory device with divided bit-line architecture |
07/06/2004 | US6759249 Device and method for reversible resistance change induced by electric pulses in non-crystalline perovskite unipolar programmable memory |
07/01/2004 | WO2004055918A2 Tamper-resistant packaging and approach |
07/01/2004 | WO2004055906A1 Spin injection device, magnetic device using the same, magnetic thin film used in the same |
07/01/2004 | WO2004055888A1 Magnetic memory device |
07/01/2004 | WO2004055866A2 Programmable interconnect cell for configuring a field programmable gate array |
07/01/2004 | WO2004055827A1 Method and system to store information |
07/01/2004 | WO2004055826A1 Using an mos select gate for a phase change memory |
07/01/2004 | WO2004055824A2 Method and device for protection of an mram device against tampering |
07/01/2004 | WO2004055823A2 Hardware security device for magnetic memory cells |
07/01/2004 | WO2004055822A2 Tamper-resisting packaging |
07/01/2004 | WO2004055821A2 Architecture for high-speed magnetic memories |
07/01/2004 | WO2004044916A3 Low standby power sram |
07/01/2004 | WO2004032143A3 Voltage generation circuitry having temperature compensation |
07/01/2004 | WO2003079463A3 Programmable structure, an array including the structure, and methods of forming the same |
07/01/2004 | US20040128628 Process for designing and manufacturing semi-conductor memory components, in particular dram components |
07/01/2004 | US20040128594 High bandwidth datapath load and test of multi-level memory cells |
07/01/2004 | US20040128433 Refresh port for a dynamic memory |
07/01/2004 | US20040127130 Magnetic material-nanomaterial heterostructural nanorod |
07/01/2004 | US20040127054 Method for manufacturing magnetic random access memory |
07/01/2004 | US20040126709 Method for manufacture of magneto-resistive bit structure |
07/01/2004 | US20040125684 Semiconductor memory device and address conversion circuit |
07/01/2004 | US20040125683 Semiconductor integrated circuit device |
07/01/2004 | US20040125682 Semiconductor device |
07/01/2004 | US20040125681 Semiconductor memory device |
07/01/2004 | US20040125680 Semiconductor memory device with self-refresh device for reducing power consumption |
07/01/2004 | US20040125679 Auto refresh control circuit of semiconductor memory device |
07/01/2004 | US20040125676 Semiconductor device |
07/01/2004 | US20040125673 Magnetic memory layers thermal pulse transitions |
07/01/2004 | US20040125668 Method and circuit for charging a signal voltage through a semiconductor memory device |
07/01/2004 | US20040125662 Semiconductor memory device having bitline coupling scheme capable of preventing deterioration of sensing speed |
07/01/2004 | US20040125660 Nonvolatile memory device efficiently changing functions of field programmable gate array at high speed |
07/01/2004 | US20040125655 Non-volatile memory and operating method thereof |
07/01/2004 | US20040125654 Programming flash memories |
07/01/2004 | US20040125653 Seek window verify program system and method for a multilevel non-volatile memory integrated circuit system |
07/01/2004 | US20040125651 Nonvolatile semiconductor memory |
07/01/2004 | US20040125650 Magnetic random access memory device with a reduced number of interconnections for selection of address |
07/01/2004 | US20040125649 MRAM and methods for reading the MRAM |
07/01/2004 | US20040125648 Magnetic random access memory and data read method thereof |
07/01/2004 | US20040125647 Magnetic random access memory for storing information utilizing magneto-resistive effects |
07/01/2004 | US20040125646 MRAM architecture |
07/01/2004 | US20040125645 Semiconductor device |
07/01/2004 | US20040125644 Multiple bit memory cells and methods for reading non-volatile data |
07/01/2004 | US20040125643 Nonvolatile memory device |
07/01/2004 | US20040125642 Ferroelectric memory device having ferroelectric capacitor and method of reading out data therefrom |
07/01/2004 | US20040125641 Interleave control device using nonvolatile ferroelectric memory |
07/01/2004 | US20040125640 Synchronous semiconductor memory device having clock synchronization circuit and circuit for controlling on/off of clock tree of the clock synchronization circuit |
07/01/2004 | US20040125636 Interleaved wordline architecture |
07/01/2004 | US20040125634 256 meg dynamic random access memory |
07/01/2004 | US20040125629 Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same |
07/01/2004 | US20040125212 Camera for printing manipulated images |
07/01/2004 | US20040125209 Camera for printing on media provided on print roll |
07/01/2004 | US20040124897 Digital control logic circuit having a characteristic of time hysteresis |
07/01/2004 | US20040124887 Circuit device with clock pulse detection facility |
07/01/2004 | US20040124886 Semi-conductor component with clock relaying device |
07/01/2004 | US20040124876 Apparatus and method of error detection and correction in a radiation-hardened static random access memory field-programmable gate array |
07/01/2004 | US20040124488 Semiconductor device |
07/01/2004 | US20040124485 Method of improving surface planarity prior to MRAM bit material deposition |
07/01/2004 | US20040124484 Spin-tunnel transistor and magnetic reproducing head |
07/01/2004 | US20040124456 Method to isolate device layer edges through mechanical spacing |
07/01/2004 | US20040124442 Display device |
07/01/2004 | US20040124440 Semiconductor device |
07/01/2004 | US20040124407 Scalable programmable structure, an array including the structure, and methods of forming the same |
06/30/2004 | EP1434238A2 Integrated circuit with programmable fuse array |
06/30/2004 | EP1434233A1 power supply circuit structure for a row decoder of a multilevel non-volatile memory device |
06/30/2004 | EP1434232A1 Memory cell |
06/30/2004 | EP1434231A2 Magnetic random access memory and data read method thereof |
06/30/2004 | EP1433182A1 Selective operation of a multi-state non-volatile memory system in a binary mode |
06/30/2004 | EP1433181A2 Current source and drain arrangement for magnetoresistive memories (mrams) |
06/30/2004 | EP1433179A1 System and method for early write to memory by holding bitline at fixed potential |
06/30/2004 | EP1157386A4 Nanocapsules containing charged particles, their uses and methods of forming the same |
06/30/2004 | CN1509498A Method for producing semiconductor storage device |
06/30/2004 | CN1509479A Circuit and method for test and repair |
06/30/2004 | CN1509476A Device and method for using complementary bits in memory array |
06/30/2004 | CN1509475A Memory cell circuit, memory device, motion vector detection device and motion compensation prediction coding device |
06/30/2004 | CN1509474A Magnetoresistive memeory |
06/30/2004 | CN1508808A Semiconductor storage device |
06/30/2004 | CN1508807A Semiconductor storage apparatus |