Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
06/2004
06/23/2004CN1155093C Semiconductor storage device possessing redundancy function
06/23/2004CN1155050C Method for producing three-D structure memory
06/23/2004CN1155004C Semiconductor memory device
06/22/2004US6754858 SDRAM address error detection method and apparatus
06/22/2004US6754849 Method of and apparatus for testing CPU built-in RAM mixed LSI
06/22/2004US6754783 Memory controller with power management logic
06/22/2004US6754778 Memory controller and a cache for accessing a main memory, and a system and a method for controlling the main memory
06/22/2004US6754649 Apparatus and method for storing data in a storage medium, while saving storage areas which are used for holding a data path name and become necessary in response to the storing of data
06/22/2004US6754134 Semiconductor storage device having multiple interrupt feature for continuous burst read and write operation
06/22/2004US6754133 Semiconductor device
06/22/2004US6754132 Devices and methods for controlling active termination resistors in a memory system
06/22/2004US6754128 Non-volatile memory operations that change a mapping between physical and logical addresses when restoring data
06/22/2004US6754127 Semiconductor integrated circuit device having internal synchronizing circuit responsive to test mode signal
06/22/2004US6754126 Semiconductor memory
06/22/2004US6754124 Hybrid MRAM array structure and operation
06/22/2004US6754123 Sensing circuit for determining logic state of memory cell in resistive memory array in which each memory cell has current control isolation, logic state being determined relative to reference cell having pre-selected logic state
06/22/2004US6754122 Semiconductor memory device having overdriven bit-line sense amplifiers
06/22/2004US6754121 Sense amplifying circuit and method
06/22/2004US6754120 DRAM output circuitry supporting sequential data capture to reduce core access times
06/22/2004US6754119 Sense amplifier for memory device
06/22/2004US6754118 Method for writing to multiple banks of a memory device
06/22/2004US6754110 Evaluation circuit for a DRAM
06/22/2004US6754108 DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators
06/22/2004US6754106 Reference cell with various load circuits compensating for source side loading effects in a non-volatile memory
06/22/2004US6754104 Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET
06/22/2004US6754103 Method and apparatus for programming and testing a non-volatile memory cell for storing multibit states
06/22/2004US6754100 High output nonvolatile magnetic memory
06/22/2004US6754099 Thin film magnetic memory device including memory cells having a magnetic tunnel junction
06/22/2004US6754098 Semiconductor memory device
06/22/2004US6754097 Read operations on multi-bit memory cells in resistive cross point arrays
06/22/2004US6754096 Apparatus and method for driving ferroelectric memory
06/22/2004US6754095 Digital to analog converter including a ferroelectric non-volatile semiconductor memory, and method for converting digital data to analog data
06/22/2004US6754094 Circuit and method for testing a ferroelectric memory device
06/22/2004US6754055 Giant magneto-resistive effect element having small leakage current, magneto-resistive effective type head having small-leakage current, thin-film magnetic memory having small leakage current and thin-film magnetic sensor having small leakage current
06/22/2004US6754054 Spin valve read element using a permanent magnet to form a pinned layer
06/22/2004US6753721 Internal step-down power supply circuit
06/22/2004US6753720 Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor
06/22/2004US6753713 System and method for expanding a pulse width
06/22/2004US6753562 Spin transistor magnetic random access memory device
06/22/2004US6753561 Cross point memory array using multiple thin films
06/22/2004US6753560 Semiconductor memory and method for driving the same
06/17/2004WO2004051742A1 Magnetoelectronics device and method for fabricating the same
06/17/2004WO2004051704A2 System and method for expanding a pulse width
06/17/2004WO2004051666A2 Reducing effects of noise coupling in integrated circuits with memory arrays
06/17/2004WO2004051665A1 Technique for sensing the state of a magneto-resistive random access memory
06/17/2004WO2004051664A2 Full rail drive enhancement to differential seu hardening circuit while loading data
06/17/2004US20040117694 Repair techniques for memory with multiple redundancy
06/17/2004US20040117543 Double data rate scheme for data output
06/17/2004US20040115839 Magnetoresistive element and method for producing the same, as well as magnetic head, magnetic memory and magnetic recording device using the same
06/17/2004US20040114454 Memory device and method for operating same
06/17/2004US20040114453 Semiconductor memory device inputting/outputting data synchronously with clock signal
06/17/2004US20040114451 Semiconductor integrated circuit and data processing system
06/17/2004US20040114449 Semiconductor memory device for improvement of defective data line relief rate
06/17/2004US20040114447 Semiconductor memory device
06/17/2004US20040114446 Semiconductor memory
06/17/2004US20040114444 Semiconductor memory device and method for programming and erasing a memory cell
06/17/2004US20040114443 Magnetic memory device, write current drive circuit, and write current drive method
06/17/2004US20040114442 Semiconductor memory
06/17/2004US20040114441 Semiconductor memory device with adjustable I/O bandwidth
06/17/2004US20040114439 Architecture for high-speed magnetic memories
06/17/2004US20040114438 Semiconductor memory device and erase method for memory array
06/17/2004US20040114436 Programmable interconnect cell for configuring a field programmable gate array
06/17/2004US20040114435 Novel architecture to suppress bit-line leakage
06/17/2004US20040114434 Nonvolatile memory system, semiconductor memory, and writing method
06/17/2004US20040114430 Semiconductor memory device
06/17/2004US20040114429 Nonvolatile memory device
06/17/2004US20040114428 Nonvolatile memory cell and non-volatile semiconductor memory device
06/17/2004US20040114427 Semiconductor memory device and method for correcting memory cell data
06/17/2004US20040114425 Magnetic memory device, method for writing on the same and method for reading from the same
06/17/2004US20040114424 Semiconductor memory device
06/17/2004US20040114423 4-bit prefetch-type FCRAM having improved data write control circuit in memory cell array and method of masking data using the 4-bit prefetch-type FCRAM
06/17/2004US20040114422 SRAM cell and integrated memory circuit using the same
06/17/2004US20040114421 DRAM Circuit and its Operation Method
06/17/2004US20040114420 System and method for effectively implementing a high-speed DRAM device
06/17/2004US20040114419 Method and system to store information
06/17/2004US20040114418 Ferroelectric memory and method of reading data in the same
06/17/2004US20040114417 Ferroelectric memory device comprising extended memory unit
06/17/2004US20040114416 Nonvolatile ferroelectric memory device
06/17/2004US20040114414 Semiconductor memory device
06/17/2004US20040114412 Method and system for intelligent bi-direction signal net with dynamically configurable input/output cell
06/17/2004US20040114411 Content addressable memory capable of stably storing ternary data
06/17/2004US20040114275 Magnetoresistive effect element, magnetic memory device and method of fabricating the same
06/17/2004US20040113986 Ink jet printhead with circular cross section chamber
06/17/2004US20040113664 Data output buffer having a preset structure
06/17/2004US20040113226 Semiconductor integrated circuit device
06/17/2004US20040113207 Vertical MOSFET SRAM cell
06/17/2004US20040113187 NAND-type magnetoresistive RAM
06/17/2004US20040113134 Using an mos select gate for a phase change memory
06/17/2004DE10354535A1 On-die termination circuit for synchronous memory device e.g. dynamic RAM, has termination enable signal generating circuit to generate termination enable signal in response to signal output from mode register set
06/17/2004DE10354523A1 Semiconductor memory device for electronic equipment, has memory cell array divided into blocks and control circuit selectively controlling wordline control circuit to activate wordlines with same row address to change page length
06/17/2004DE10255834A1 Integrated semiconducting memory has read amplifier(s), pair(s) of bit lines with n segment bit line pairs for separate electrical connection to read amplifier; n is natural number greater than 1
06/17/2004DE10255541A1 Memory arrangement for a microcomputer circuit with a Harvard-architecture, has four memory units that are used during software upgrading to prevent software corruption in the event or a power loss or other system interruption
06/17/2004DE10027003B4 Halbleiterschaltungsvorrichtung mit der Fähigkeit, Stromversorgungspotentiale extern an eine interne Schaltung anzulegen und dabei Rauschen einzuschränken Semiconductor integrated circuit device with the ability to create electricity supply potentials external to an internal circuit and thereby reduce noise
06/17/2004CA2507693A1 System and method for expanding a pulse width
06/16/2004EP1429351A1 Magnetic memory array, method for recording in a magnetic memory array and method for reading out from a magnetic memory array
06/16/2004EP1429342A1 MRAM having NAND structure
06/16/2004EP1429341A1 Magnetic memory device and its recording control method
06/16/2004EP1429227A2 Method for preventing tampering of a semiconductor integrated circuit
06/16/2004EP1428269A1 Antiparallel magnetoresistive memory cells
06/16/2004EP1428222A2 Background operation for memory cells