Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
02/2006
02/23/2006US20060039198 Bitline governed approach for coarse/fine programming
02/23/2006US20060039194 Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions
02/23/2006US20060039193 Thin film magnetic memory device suppressing internal magnetic noises
02/23/2006US20060039192 Phase-changeable memory devices including an adiabatic layer and methods of forming the same
02/23/2006US20060039191 System and method for reading a memory cell
02/23/2006US20060039190 Method of writing to MRAM devices
02/23/2006US20060039189 Magnetic random access memory with tape read line, fabricating method and circuit thereof
02/23/2006US20060039188 Magnetic random access memory with stacked memory layers having access lines for writing and reading
02/23/2006US20060039187 MRAM with vertical storage element and field sensor
02/23/2006US20060039186 MRAM with vertical storage element in two layer-arrangement and field sensor
02/23/2006US20060039185 MRAM with magnetic via for storage of information and field sensor
02/23/2006US20060039184 Using permanent magnets in MRAM to assist write operation
02/23/2006US20060039183 Multi-sensing level MRAM structures
02/23/2006US20060039182 Self-aligned row-by-row dynamic VDD SRAM
02/23/2006US20060039180 Stable memory cell
02/23/2006US20060039179 Low power circuits with small voltage swing transmission, voltage regeneration and wide bandwidth architecture
02/23/2006US20060039178 Device having a memory array storing each bit in multiple memory cells
02/23/2006US20060039177 Ferroelectric memory
02/23/2006US20060039176 Memory cell
02/23/2006US20060039175 Nonvolatile semiconductor memory device and method for fabricating the same
02/23/2006US20060039174 Memory module with termination component
02/23/2006US20060038768 Field emission display
02/23/2006DE102004039565A1 Mehrlagige Wärmeleitfolie Multi-layer thermal pad
02/22/2006EP1628352A1 Electric switch and storage device using same
02/22/2006EP1628309A1 Method for arranging data in a memory cell array
02/22/2006EP1627392A1 Circuit configuration for a current switch of a bit/word line of a mram device
02/22/2006EP1502264B1 Layout for thermally selected cross-point mram cell
02/22/2006EP0946988B1 Memory redundancy circuit using single polysilicon floating gate transistors as redundancy elements
02/22/2006CN2760713Y Static memory element using partially depleted and fully depleted transistor constructiveness
02/22/2006CN1739165A Programmable interconnect cell for configuring a field programmable gate array
02/22/2006CN1739163A 浮动栅模拟电压反馈电路 Analog floating gate voltage feedback circuit
02/22/2006CN1243251C Modular structure for testing momery in testing system based on event
02/21/2006US7003684 Memory control chip, control method and control circuit
02/21/2006US7003639 Memory controller with power management logic
02/21/2006US7003621 Methods of sanitizing a flash-based data storage device
02/21/2006US7003619 Memory device and method for storing and reading a file system structure in a write-once memory array
02/21/2006US7002875 Semiconductor memory
02/21/2006US7002873 Memory array with staged output
02/21/2006US7002871 Asynchronous pseudo SRAM and access method therefor
02/21/2006US7002868 High-speed, two-port dynamic random access memory (DRAM) with a late-write configuration
02/21/2006US7002867 Refresh control circuit for ICs with a memory array
02/21/2006US7002866 Semiconductor memory device
02/21/2006US7002864 SRAM-compatible memory device having three sense amplifiers between two memory blocks
02/21/2006US7002863 Driving a DRAM sense amplifier having low threshold voltage PMOS transistors
02/21/2006US7002862 Semiconductor memory device with sense amplifier driver having multiplied output lines
02/21/2006US7002861 Memory device for controlling programming setup time
02/21/2006US7002860 Multilevel register-file bit-read method and apparatus
02/21/2006US7002858 Semiconductor memory device which selectively controls a local input/output line sense amplifier
02/21/2006US7002857 Semiconductor device having automatic controlled delay circuit and method therefor
02/21/2006US7002856 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
02/21/2006US7002854 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same
02/21/2006US7002852 Data output circuits for synchronous integrated circuit memory devices
02/21/2006US7002848 Nonvolatile semiconductor memory device
02/21/2006US7002847 Electrically alterable non-volatile multi-level memory device and method of operating such a device
02/21/2006US7002843 Variable current sinking for coarse/fine programming of non-volatile memory
02/21/2006US7002842 Floating-body dynamic random access memory with purge line
02/21/2006US7002841 MRAM and methods for manufacturing and driving the same
02/21/2006US7002840 Magnetoresistive element including a yoke that surrounds a conductor, magnetic memory cell and magnetic memory device including the same
02/21/2006US7002839 Magnetic ring unit and magnetic memory device
02/21/2006US7002838 Semiconductor storage device
02/21/2006US7002837 Non-volatile semiconductor memory device
02/21/2006US7002836 Ferroelectric-type nonvolatile semiconductor memory and operation method thereof
02/21/2006US7002835 Memory cell and semiconductor memory device
02/21/2006US7002834 Semiconductor integrated circuit
02/21/2006US7002833 Complementary bit resistance memory sensor and method of operation
02/21/2006US7002832 One-time programming multiple-level memory cells
02/21/2006US7002831 Magnetic semiconductor memory device
02/21/2006US7002826 Semiconductor memory device
02/21/2006US7002820 Semiconductor storage device
02/21/2006US7002587 Semiconductor device, image data processing apparatus and method
02/21/2006US7002538 Liquid crystal display, driving method thereof and frame memory
02/21/2006US7002388 Nonvolatile flip-flop circuit and method of driving the same
02/21/2006US7002258 Dual port memory core cell architecture with matched bit line capacitances
02/21/2006US7002228 Diffusion barrier for improving the thermal stability of MRAM devices
02/21/2006US7002198 Junction-isolated depletion mode ferroelectric memory devices
02/21/2006US7002197 Cross point resistive memory array
02/21/2006US7002195 Magnetic random access memory (MRAM) cells having split sub-digit lines
02/21/2006US7002194 Via AP switching
02/21/2006US7001816 Embedded ROM device using substrate leakage
02/21/2006US7001811 Method for making memory cell without halo implant
02/21/2006US7001783 Mask schemes for patterning magnetic tunnel junctions
02/21/2006US7001777 Method of manufacturing a magnetic tunnel junction device
02/21/2006US7001012 Printhead chip incorporating a double action ink ejection mechanism
02/21/2006US7000846 Semiconductor memory device
02/16/2006WO2006015569A1 Thermally conducting multi-layer film
02/16/2006WO2005112034A3 Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same
02/16/2006US20060036829 Memory space allocation methods and IC products utilizing the same
02/16/2006US20060034145 Synchronous semiconductor memory device of fast random cycle system and test method thereof
02/16/2006US20060034143 Semiconductor memory device having the operating voltage of the memory cell controlled
02/16/2006US20060034133 Semiconductor memory
02/16/2006US20060034128 Non-volatile memory device and erase method of the same
02/16/2006US20060034127 Flash memory device having multi-level cell and reading and programming method thereof
02/16/2006US20060034126 Preconditioning of defective and redundant columns in a memory device
02/16/2006US20060034125 Display device with reduced interference between pixels
02/16/2006US20060034124 Novel multi-state memory
02/16/2006US20060034118 Magneto-resistance effect element, magnetic memory and magnetic head
02/16/2006US20060034117 Methods of operating magnetic random access memory device using spin injection and related devices
02/16/2006US20060034116 Cross point array cell with series connected semiconductor diode and phase change storage media
02/16/2006US20060034115 Natural analog or multilevel transistor DRAM-cell
02/16/2006US20060034114 Gate driving circuit and gate driving method of power MOSFET