| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 06/01/2006 | US20060114716 Magnetoresistance element, magnetic memory, and magnetic head |
| 06/01/2006 | US20060114715 Memory |
| 06/01/2006 | US20060114714 Magnetroresistive random access memory and method of manufacturing the same |
| 06/01/2006 | US20060114713 MRAM with coil for creating offset field |
| 06/01/2006 | US20060114712 Mram with switchable ferromagnetic offset layer |
| 06/01/2006 | US20060114711 Memory circuit |
| 06/01/2006 | US20060114710 Ferroelectric-type nonvolatile semiconductor memory |
| 06/01/2006 | US20060114709 Semiconductor storage device, operation method of the same and test method of the same |
| 06/01/2006 | US20060114301 Casing for an ink cartridge |
| 06/01/2006 | US20060113612 Insulated-gate semiconductor device and approach involving junction-induced intermediate region |
| 06/01/2006 | US20060113583 Twin EEPROM memory transistors with subsurface stepped floating gates |
| 06/01/2006 | DE4447755B4 Rapid signal transmission system between digital circuits, e.g. between CPU and memory arrangement, e.g. integrated memory circuit - uses transmit and receive modules with integrated circuits coupled to main line with matched impedance values |
| 06/01/2006 | DE102005055436A1 Random access memory chip, has magnetoresistive memory cells each including magnetic tunnel junction having fixed and free magnetic regions, where free magnetic region includes two ferromagnetic layers that are antiferromagnetically coupled |
| 06/01/2006 | DE102005052272A1 Nonvolatile semiconductor device e.g. electrically erasable programable ROM, has multi-bit nonvolatile memory unit cell with set of transistors for sharing source and drain regions |
| 06/01/2006 | DE102005020079A1 Hybrid memory cell for dynamic random access memory (DRAM), containing specified substrate with transistor structure(s) with drain, source, control contact and channel zone between drain and source, etc |
| 06/01/2006 | DE102004058220A1 Memory/storage module e.g. DRAM-storage device, uses control terminal for output driver circuit for influencing rise and fall rates of output signal |
| 06/01/2006 | DE102004057232A1 Semiconductor memory device operating method, involves setting preamble, which is number of clock cycles between edge of data clock signal and bit of data signals that are transmitted to and/or from semiconductor memory device |
| 06/01/2006 | DE10038228B4 Zellenblockstruktur eines nichtflüchtigen ferroelektrischen Speichers Cell block structure of a non-volatile ferroelectric memory |
| 05/31/2006 | EP1662575A2 A NOT circuit |
| 05/31/2006 | EP1662563A2 Methods of forming memory arrays |
| 05/31/2006 | EP1662562A2 Methods for forming conductive capacitor plugs |
| 05/31/2006 | EP1662561A2 Methods of forming capacitor contact openings |
| 05/31/2006 | EP1662510A2 Arrangement of write lines in an MRAM device |
| 05/31/2006 | EP1661188A2 Magnetoresistive random access memory with reduced switching field variation |
| 05/31/2006 | EP1661143A2 Method and system for providing a programmable current source for a magnetic memory |
| 05/31/2006 | EP1661141A1 A polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric |
| 05/31/2006 | EP1661140A1 Mram array with segmented magnetic write lines |
| 05/31/2006 | EP1661139A2 Method of writing to a multi-state magnetic random access memory cell |
| 05/31/2006 | EP1661137A2 Low voltage operation dram control circuits |
| 05/31/2006 | EP1660898A2 Self-heating burn-in |
| 05/31/2006 | EP1576610B1 Sense amplifier for a memory having at least two distinct resistance states |
| 05/31/2006 | EP1485920B1 Increasing the read signal in ferroelectric memories |
| 05/31/2006 | EP1216478B1 Arrangement to reduce coupling noise between bitlines |
| 05/31/2006 | EP1157386B1 Nanocapsules containing charged particles, their uses and methods of forming the same |
| 05/31/2006 | CN1781157A Non-volatile memory having a bias on the source electrode for HCI programming |
| 05/31/2006 | CN1781156A Cladding material on conductive lines of MRAM |
| 05/31/2006 | CN1780013A On-chip electrically alterable resistor |
| 05/31/2006 | CN1779979A Semiconductor device and methods of arranging and manufacturing same |
| 05/31/2006 | CN1779855A Power-on programm with low-power random access memory |
| 05/31/2006 | CN1779854A Memory device, memory controller and memory system having bidirectional clock lines |
| 05/31/2006 | CN1779853A Volatile memory devices with auto-refresh command unit and circuit for controlling auto-refresh operation thereof and related memory systems and operating methods |
| 05/31/2006 | CN1779852A Memory chip internal power administrative framework in deep shutdown mode |
| 05/31/2006 | CN1779851A Storage and semiconductor device |
| 05/31/2006 | CN1779848A Storage device and semiconductor device |
| 05/31/2006 | CN1779661A Device and method for delaying nonvolatile memory using life |
| 05/31/2006 | CN1258225C Nonvolatile storage device |
| 05/31/2006 | CN1258222C Semiconductor memory |
| 05/31/2006 | CN1258221C Semiconductor storage device and its driving method |
| 05/31/2006 | CN1258189C 半导体存储器 Semiconductor memory |
| 05/31/2006 | CN1258188C Method for controlling semiconductor device and semiconductor device |
| 05/31/2006 | CN1258150C Semiconductor device |
| 05/30/2006 | US7055007 Data processor memory circuit |
| 05/30/2006 | US7054991 Method for controlling non-volatile semiconductor memory system |
| 05/30/2006 | US7054225 Semiconductor memory device having an address detector and pulse synthesizer to preset data record output errors |
| 05/30/2006 | US7054224 Non-synchronous semiconductor memory device having page mode read/write |
| 05/30/2006 | US7054223 Semiconductor memory device |
| 05/30/2006 | US7054221 Data pass control device for masking write ringing in DDR SDRAM and method thereof |
| 05/30/2006 | US7054217 Semiconductor memory device |
| 05/30/2006 | US7054216 Programmable MOS device formed by hot carrier effect |
| 05/30/2006 | US7054214 Semiconductor device |
| 05/30/2006 | US7054213 Method and circuit for determining sense amplifier sensitivity |
| 05/30/2006 | US7054211 Semiconductor memory storage device capable of high operating speed |
| 05/30/2006 | US7054204 Semiconductor device and method for controlling the same |
| 05/30/2006 | US7054202 High burst rate write data paths for integrated circuit memory devices and methods of operating same |
| 05/30/2006 | US7054201 Driving circuit for non-volatile DRAM |
| 05/30/2006 | US7054200 Semiconductor device |
| 05/30/2006 | US7054199 Multi level flash memory device and program method |
| 05/30/2006 | US7054197 Method for reading a nonvolatile memory device and nonvolatile memory device implementing the reading method |
| 05/30/2006 | US7054193 Non-uniform programming pulse width for writing of multi-bit-per-cell memories |
| 05/30/2006 | US7054192 Method of controlling threshold voltage of NROM cell |
| 05/30/2006 | US7054191 Method and system for writing data to memory cells |
| 05/30/2006 | US7054190 Logic-in-memory circuit using magnetoresistive element |
| 05/30/2006 | US7054189 Magnetic random access memory |
| 05/30/2006 | US7054188 Magnetic memory device |
| 05/30/2006 | US7054187 Magnetic memory |
| 05/30/2006 | US7054186 Magnetic random access memory |
| 05/30/2006 | US7054185 Optimized MRAM current sources |
| 05/30/2006 | US7054184 Cache late select circuit |
| 05/30/2006 | US7054183 Adaptive programming technique for a re-writable conductive memory device |
| 05/30/2006 | US7054182 Nonvolatile FeRam control device |
| 05/30/2006 | US7054181 Non-volatile ferroelectric cell array block having hierarchy transfer sensing architecture |
| 05/30/2006 | US7054119 Coupled ferromagnetic systems having modified interfaces |
| 05/30/2006 | US7053693 Voltage generating circuit, voltage generating device and semiconductor device using the same, and driving method thereof |
| 05/30/2006 | US7053686 Data strobe circuit using clock signal |
| 05/30/2006 | US7053668 SOI sense amplifier with cross-coupled body terminal |
| 05/30/2006 | US7053434 Ferroelectric memory device and method of making the same |
| 05/30/2006 | US7053430 Antiferromagnetic stabilized storage layers in GMRAM storage devices |
| 05/30/2006 | US7053429 Bias-adjusted giant magnetoresistive (GMR) devices for magnetic random access memory (MRAM) applications |
| 05/30/2006 | US7053428 Digital magnetic memory cell device |
| 05/30/2006 | US7052103 Printing device for use with a printing cartridge having capacitive sensor identification |
| 05/30/2006 | CA2227612C Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom |
| 05/26/2006 | WO2006055062A1 Spin-current switchable magnetic memory element and method of fabricating the memory element |
| 05/26/2006 | WO2006054355A1 Semiconductor storage device |
| 05/26/2006 | WO2006053756A1 Twin-cell bit line sensing configuration |
| 05/26/2006 | WO2005119687A3 Automatic hidden refresh in a dram and method therefor |
| 05/26/2006 | WO2005098908A3 Creation of electron traps in metal nitride and metal oxide electrodes in polymer memory devices |
| 05/25/2006 | US20060112295 Information processing device using variable operation frequency |
| 05/25/2006 | US20060112231 Synchronous DRAM with selectable internal prefetch size |
| 05/25/2006 | US20060110846 Electrically programmable memory element with improved contacts |
| 05/25/2006 | US20060109725 Apparatus and method for managing bad blocks in a flash memory |