Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
08/2006
08/10/2006US20060176728 Local bit select circuit with slow read recovery scheme
08/10/2006US20060176727 Radiation-hardened SRAM cell with write error protection
08/10/2006US20060176726 Integrated DRAM-NVRAM multi-level memory
08/10/2006US20060176725 PMC memory circuit and method for storing a datum in a PMC memory circuit
08/10/2006US20060176101 Semiconductor integrated circuit
08/10/2006US20060176092 Delay time adjusting method of delaying a phase of an output signal until a phase difference between an input signal and the output signal becomes an integral number of periods other than zero
08/10/2006US20060176088 Semiconductor integrated circuit device
08/10/2006US20060176083 Single ended three transistor quasi-static ram cell
08/10/2006US20060175649 SRAM devices, and electronic systems comprising SRAM devices
08/10/2006US20060175604 Novel type of attachment of organic molecules to a silicon surface for producing memory elements having organic constituents
08/10/2006DE102006001107A1 Verfahren zum Herstellen von MRAM-Zellen A method of manufacturing MRAM cells
08/10/2006DE102005005326A1 Synchronization and data recovery device for e.g. DRAM-component, has finite impulse response low pass filter using weighted values and sampled values of previous and consecutive sampled symbols to judge instantaneous symbol
08/09/2006EP1689006A2 Multi-bit magnetic memory device using spin-polarized current and methods of manufacturing and operating the same
08/09/2006EP1688959A1 Method for programming a memory device suitable to minimize the lateral coupling effects between memory cells
08/09/2006EP1688956A1 Dynamic memory for mobile phone
08/09/2006EP1688955A2 Semiconductor memory
08/09/2006EP1688864A1 Multi input memory device reader
08/09/2006EP1687897A1 Input/output device for a clock signal, in particular for the correction of clock signals
08/09/2006EP1687855A1 Integrated semiconductor memory and method for producing an integrated semiconductor memory
08/09/2006EP1687838A2 A high temperature memory device
08/09/2006EP1552528A4 Method of establishing reference levels for sensing multilevel memory cell states
08/09/2006EP1509922B1 Mram-cell and array-architecture with maximum read-out signal and reduced electromagnetic interference
08/09/2006EP1471643B1 Logical operation circuit and logical operation method
08/09/2006EP1468421B1 Method and apparatus to program a phase change memory
08/09/2006EP1461810B1 A method for reading a passive matrix-addressable device and a device for performing the method
08/09/2006EP1402531B1 Dram with bit line precharging, inverted data writing, retained data output and reduced power consumption
08/09/2006EP1299884B1 Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible
08/09/2006EP0827082B1 Semiconductor memory having arithmetic function
08/09/2006CN2805023Y Wordline decoder and storage device
08/09/2006CN2805022Y Magnetic random axxess storage device
08/09/2006CN1816968A Nonvolatile flip-flop circuit, and method for driving the same
08/09/2006CN1816882A Sram cell structure and circuits
08/09/2006CN1815769A Magnetoresistance device and method of fabrication using titanium nitride as capping layer
08/09/2006CN1815718A Memory cell array
08/09/2006CN1815627A Method and circuits using for dynamic memory circuit reading
08/09/2006CN1815626A Storage access controller and storage access method
08/09/2006CN1815625A Synchronous dynamic storage controller designing method
08/09/2006CN1815624A 半导体器件 Semiconductor devices
08/09/2006CN1815623A Magnetoresistance random access memory array
08/09/2006CN1815621A Systems and methods for accessing memory cells
08/09/2006CN1815363A Wet-method etching liquid for making phase change storage and its wet-method etching process
08/09/2006CN1269204C Surface treatment method capable of improving copper metal layer structure
08/09/2006CN1269153C Method for preparing monomolecular magnet (Mn1-XCrX)12-ac
08/09/2006CN1269139C Semiconductor memory
08/09/2006CN1269136C Synchronous semiconductor memory apparatus with plurality of memory sets and method for controlling same
08/09/2006CN1269135C Semiconductor memory device and its checking method
08/09/2006CN1269134C Magnetic random access memory and mfg. method thereof
08/09/2006CN1269133C Film magnet memory making data write by bidirection data writing in magnetic field
08/09/2006CN1269131C Differencial current estimation circuit and reading amplifying circuit
08/08/2006US7089465 Multi-port memory device having serial I/O interface
08/08/2006US7089351 Semiconductor memory device for preventing a late write from disturbing a refresh operation
08/08/2006US7089350 Methods of sanitizing a flash-based data storage device
08/08/2006US7088637 Semiconductor memory device for high speed data access
08/08/2006US7088636 Semiconductor memory circuit
08/08/2006US7088635 Bank based self refresh control apparatus in semiconductor memory device and its method
08/08/2006US7088633 Method and system for providing seamless self-refresh for directed bank refresh in volatile memories
08/08/2006US7088632 Automatic hidden refresh in a dram and method therefor
08/08/2006US7088630 Circuit and method for high speed sensing
08/08/2006US7088629 Semiconductor memory device
08/08/2006US7088628 Memory device and method of amplifying voltage levels of bit line and complementary bit line
08/08/2006US7088625 Distributed write data drivers for burst access memories
08/08/2006US7088624 System of multiplexed data lines in a dynamic random access memory
08/08/2006US7088621 Bitline governed approach for coarse/fine programming
08/08/2006US7088618 Method of evaluating characteristics of semiconductor memory element, and method of extracting model parameter of semiconductor memory element
08/08/2006US7088616 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell
08/08/2006US7088615 Multi-state memory
08/08/2006US7088614 Programming method for a multilevel memory cell
08/08/2006US7088613 Method for controlling current during read and program operations of programmable diode
08/08/2006US7088612 MRAM with vertical storage element in two layer-arrangement and field sensor
08/08/2006US7088611 MRAM with switchable ferromagnetic offset layer
08/08/2006US7088610 Magnetic memory apparatus and method of manufacturing magnetic memory apparatus
08/08/2006US7088609 Spin barrier enhanced magnetoresistance effect element and magnetic memory using the same
08/08/2006US7088608 Reducing power consumption during MRAM writes using multiple current levels
08/08/2006US7088607 Static memory cell and SRAM device
08/08/2006US7088606 Dynamic RAM storage techniques
08/08/2006US7088605 FeRAM memory design using ROM array architecture
08/08/2006US7088604 Multi-bank memory
08/08/2006US7088152 Data driving circuit and semiconductor memory device having the same
08/08/2006US7088128 Circuit module
08/08/2006US7087971 Magnetic sensor based on efficient spin injection into semiconductors
08/08/2006US7087942 Semiconductor integrated circuit device with reduced leakage current
08/08/2006US7087919 Layered resistance variable memory device and method of fabrication
08/08/2006US7086724 Compact media and ink cartridge for inkjet printhead
08/08/2006US7086720 Micro-electromechanical fluid ejection device that incorporates a shape memory alloy based actuator
08/08/2006US7086709 Print engine controller for high volume pagewidth printing
08/03/2006WO2006081150A2 System and method for performing concatenation of diversely routed channels
08/03/2006WO2006080065A1 Storing apparatus and method for controlling the same
08/03/2006WO2006079874A1 Ideal cmos sram system implementation
08/03/2006WO2006079215A1 Magnetic memory composition and method of manufacture
08/03/2006WO2006036691A3 Ferroelectric polymer memory device including polymer electrodes and method of fabricating the same
08/03/2006WO2005038864A3 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
08/03/2006US20060172493 Forming multi-layer memory arrays
08/03/2006US20060171224 1T-nmemory cell structure and its method of formation and operation
08/03/2006US20060171210 Nonvolatile semiconductor memory device which uses some memory blocks in multilevel memory as binary memory blocks
08/03/2006US20060171200 Memory using mixed valence conductive oxides
08/03/2006US20060171199 Magnetic random access memory with memory cell stacks having more than two magnetic states
08/03/2006US20060171198 Spin-injection magnetic random access memory
08/03/2006US20060171197 Magnetoresistive memory element having a stacked structure
08/03/2006US20060171196 Method for writing to magnetoresistive memory cells and magnetoresistive memory which can be written to by the method
08/03/2006US20060171195 Semiconductor memory device