Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2011
11/01/2011US8050094 Memory cell array and non-volatile memory device
11/01/2011US8050093 Non-volatile memory device and bad block remapping method
11/01/2011US8050092 NAND flash memory with integrated bit line capacitance
11/01/2011US8050088 Programming method of non-volatile memory device
11/01/2011US8050087 Non-volatile memory device including block state confirmation cell and method of operating the same
11/01/2011US8050086 Distortion estimation and cancellation in memory devices
11/01/2011US8050085 Semiconductor processing device and IC card
11/01/2011US8050084 Nonvolatile memory device, storage system having the same, and method of driving the nonvolatile memory device
11/01/2011US8050083 Phase change memory device and write method thereof
11/01/2011US8050082 Two-stage 8T SRAM cell design
11/01/2011US8050080 Random access memory with CMOS-compatible nonvolatile storage element in series with storage capacitor
11/01/2011US8050079 Nonvolatile memory device using variable resistive element
11/01/2011US8050078 Nanowire-based memristor devices
11/01/2011US8049535 Sense amplifier for low voltage high speed sensing
11/01/2011US8049267 Semiconductor device and method of manufacturing the same
11/01/2011US8049219 Integrated circuit, semiconductor device comprising the same, electronic device having the same, and driving method of the same
11/01/2011US8048755 Resistive memory and methods of processing resistive memory
11/01/2011US8048684 Structure and method for manipulating spin quantum state through dipole polarization switching
10/2011
10/27/2011WO2011133763A2 Retain-till-accessed (rta) power saving mode in high performance static memories
10/27/2011WO2011133404A1 Programming non-volatile storage includng reducing impact from other memory cells
10/27/2011WO2011133356A1 10t sram for graphics processing
10/27/2011WO2011133139A1 Refreshing memristive systems
10/27/2011WO2011131511A1 Dynamic read/write memory device having improved word line control circuitry
10/27/2011WO2011131130A1 Shift register, gate driving device and data line driving device for liquid crystal display
10/27/2011WO2011130835A1 Status indication in a system having a plurality of memory devices
10/27/2011WO2011109487A8 Method and apparatus for testing a memory device
10/27/2011WO2011109132A3 Flash memory hash table
10/27/2011US20110261639 Semiconductor memory circuit
10/27/2011US20110261628 256 Meg dynamic random access memory
10/27/2011US20110261617 Semiconductor memory device having memory block configuration
10/27/2011US20110261616 Write scheme in phase change memory
10/27/2011US20110261615 Semiconductor device, semiconductor system having the same, and method for operating the semiconductor device
10/27/2011US20110261614 Semiconductor device
10/27/2011US20110261613 Phase change memory array blocks with alternate selection
10/27/2011US20110261612 Semiconductor memory apparatus and method for generating programming current pulse
10/27/2011US20110261611 Semiconductor memory apparatus
10/27/2011US20110261610 Nonvolatile memory device and method for controlling the same
10/27/2011US20110261609 Retain-Till-Accessed Power Saving Mode in High-Performance Static Memories
10/27/2011US20110261608 Self-Repairing Memristor and Method
10/27/2011US20110261607 Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells, Methods Of Forming Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells, And Methods Of Reading A Data Value Stored By An Array Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells
10/27/2011US20110261606 Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells, Methods Of Forming Arrays Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells, And Methods Of Reading A Data Value Stored By An Array Of Vertically Stacked Tiers Of Non-Volatile Cross Point Memory Cells
10/27/2011US20110261605 Graphene-based switching elements using a diamond-shaped nano-patch and interconnecting nano-ribbons
10/27/2011US20110260224 Thin film magnetic memory device capable of conducting stable data read and write operations
10/27/2011CA2800612A1 Status indication in a system having a plurality of memory devices
10/26/2011EP2380175A1 Balancing a signal margin of a resistance based memory circuit
10/26/2011EP2380174A1 Self-tuning of signal path delay in circuit employing multiple voltage domains
10/26/2011EP2016590B1 Non-volatile memory with background data latch caching during read operations and methods therefor
10/26/2011CN1689109B Dual loop sensing scheme for resistive memory elements
10/26/2011CN102227777A Non-volatile state retention latches
10/26/2011CN102227776A Digitally-controllable delay for sense amplifier
10/26/2011CN101752497B Phase-change storage unit with low power consumption and high stability and preparation method thereof
10/26/2011CN101459219B Current constricting phase change memory element structure
10/26/2011CN101452743B Writing-in system and method for phase change memory
10/26/2011CN101383185B Magnetic random access memory
10/26/2011CN101231884B Current compliant sensing architecture for multilevel phase change memory
10/25/2011US8045415 Memory devices having programmable elements with accurate operating parameters stored thereon
10/25/2011US8045413 High speed DRAM architecture with uniform access latency
10/25/2011US8045410 Memory cell array
10/25/2011US8045396 Memory and reading method thereof
10/25/2011US8045395 Circuits, systems and methods for driving high and low voltages on bit lines in non-volatile memory
10/25/2011US8045394 Word line driving circuit, semiconductor memory device including the same, and method for testing the semiconductor memory device
10/25/2011US8045393 Program method of nonvolatile memory device
10/25/2011US8045392 Multiple level programming in a non-volatile memory device
10/25/2011US8045390 Memory system with dynamic reference cell and method of operating the same
10/25/2011US8045389 Semiconductor memory device
10/25/2011US8045388 Semiconductor device and control method of the same
10/25/2011US8045387 Nonvolatile memory device and program method with improved pass voltage window
10/25/2011US8045386 Methods and apparatus for programming a memory cell using one or more blocking memory cells
10/25/2011US8045383 Non-volatile memory devices including dummy word lines and related structures and methods
10/25/2011US8045381 Device for protecting a memory against attacks by error injection
10/25/2011US8045376 Flash memory device with multi level cell and burst access method therein
10/25/2011US8045373 Method and apparatus for programming memory cell array
10/25/2011US8045371 Magnetic storage device having a buffer track and storage tracks, and method of operating the same
10/25/2011US8045370 Memory self-reference read and write assist methods
10/25/2011US8045369 Semiconductor device and driving method of the same
10/25/2011US8045368 Phase-change memory device
10/25/2011US8045367 Phase change memory
10/25/2011US8045366 STRAM with composite free magnetic element
10/25/2011US8045365 Apparatus and method for self-refreshing dynamic random access memory cells
10/25/2011US8045364 Non-volatile memory device ion barrier
10/25/2011US8045363 Variable resistance memory devices including arrays of different sizes
10/25/2011US8045362 Semiconductor memory device
10/25/2011US8045361 Non-volatile memory cell with complementary resistive memory elements
10/25/2011US8045360 Semiconductor device having single-ended sensing amplifier
10/25/2011US8045359 Switching element, method of manufacturing the switching element, and memory element array
10/25/2011US8045358 Nonvolatile semiconductor memory device
10/25/2011US8045357 Semiconductor memory device
10/25/2011US8044816 Apparatus, system, and method for detecting the formation of a short between a magnetoresistive head and a head substrate
10/20/2011WO2011129233A1 Semiconductor device
10/20/2011WO2011128867A1 Multiple programming of flash memory without erase
10/20/2011WO2011066324A3 Magnetic tunnel junction device and fabrication
10/20/2011WO2011055970A3 Ternary content-addressable memory
10/20/2011US20110258395 Preventing Fast Read Before Write in Static Random Access Memory Arrays
10/20/2011US20110258373 Memory Module, Memory System,and Information Device
10/20/2011US20110255357 Dynamic random access memory (dram) refresh
10/20/2011US20110255333 Phase change memory device with improved performance that minimizes cell degradation
10/20/2011US20110255332 Semiconductor memory device
10/20/2011US20110255331 Memory cells with rectifying device
10/20/2011US20110255330 Nonvolatile semiconductor memory device
10/20/2011US20110255329 Nonvolatile semiconductor memory device, method of supplying voltage in the same, and semiconductor device
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