Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2011
09/28/2011EP2368248A1 Adaptive erase and soft programming for memory
09/28/2011EP2368247A1 Boosted gate voltage programming for spin-torque mram array
09/28/2011EP2368246A1 Method, system and apparatus for tri-stating unused data bytes during ddr dram writes
09/28/2011EP1656676B1 Detecting over programmed memory
09/28/2011EP1312093B1 Memory device having posted write per command
09/28/2011CN201994074U 一种产生dram内部写时钟的电路 A method for generating internal write clock circuit dram
09/28/2011CN1753103B Integrated circuit memory devices having hierarchical bit line selection circuits therein
09/28/2011CN1716447B Semiconductor memory device for low power consumption and its operation method
09/28/2011CN102203877A Method and apparatus for soft data generation for memory devices using decoder performance feedback
09/28/2011CN102203876A Methods and apparatus for soft data generation for memory devices
09/28/2011CN102203875A Methods and apparatus for soft data generation for memory devices using reference cells
09/28/2011CN102203871A 半导体集成电路 The semiconductor integrated circuit
09/28/2011CN102203870A Word line voltage control in stt-mram
09/28/2011CN102203869A Spin torque transfer cell structure utilizing field-induced antiferromagnetic or ferromagnetic coupling
09/28/2011CN102203868A Resistive memory
09/28/2011CN102203866A Differential on-line termination
09/28/2011CN102201429A Resistive Random Access Memory (RRAM) unit
09/28/2011CN102201257A Stacking type SDRAM (synchronous dynamic random access memory) expansion structure
09/28/2011CN102201256A Symmetric synchronous dynamic random access memory (SDRAM) expanded structure
09/28/2011CN101345251B Memory unit array on semiconductor substrate and its manufacture method
09/27/2011US8028121 Method and apparatus for detecting static data area, wear-leveling, and merging data units in nonvolatile data storage device
09/27/2011US8027471 Multimedia storage systems and methods
09/27/2011US8027201 Nonvolatile memory device with load-free wired-or structure and an associated driving method
09/27/2011US8027200 Reduction of quick charge loss effect in a memory device
09/27/2011US8027197 Nonvolatile memory device
09/27/2011US8027196 Parallel programming of multiple-bit-per-cell memory cells by controlling program pulsewidth and programming voltage
09/27/2011US8027193 Semiconductor memory device having bit line disturbance preventing unit
09/27/2011US8027192 Resistive memory devices using assymetrical bitline charging and discharging
09/27/2011US8027191 Write circuit for providing distinctive write currents to a chalcogenide memory cell
09/27/2011US8027190 Command processing circuit and phase change memory device using the same
09/27/2011US8027189 Nonvolatile memory device
09/27/2011US8027188 Semiconductor memory device
09/27/2011US8027187 Memory sensing devices, methods, and systems
09/27/2011US8027186 Programming a phase change memory
09/27/2011US8027185 Techniques for electrically characterizing tunnel junction film stacks with little or no processing
09/27/2011US8027184 Semiconductor storage device and operating method of the same
09/27/2011US8026757 Current mirror circuit, in particular for a non-volatile memory device
09/27/2011US8026563 Spin transistor based on the spin-filter effect, and non-volatile memory using spin transistors
09/27/2011US8025366 Inkjet printhead with nozzle layer defining etchant holes
09/22/2011WO2011115769A2 System and method for cognitive processing for data fusion
09/22/2011WO2011114919A1 Semiconductor device
09/22/2011WO2011114905A1 Semiconductor memory device
09/22/2011WO2011114868A1 Semiconductor device
09/22/2011WO2011114867A1 Semiconductor device and driving method of semiconductor device
09/22/2011WO2011114866A1 Memory device and semiconductor device
09/22/2011WO2011113667A1 Managing memory refreshes
09/22/2011WO2011088375A3 Spin torque driven magnetic tunnel junction with non-uniform current path and composite hardmask architecture for forming the same
09/22/2011US20110228613 Device and method for achieving sram output characteristics from drams
09/22/2011US20110228600 Memory programming
09/22/2011US20110228599 Non-Volatile Memory Cell with Programmable Unipolar Switching Element
09/22/2011US20110228598 Transmission gate-based spin-transfer torque memory unit
09/22/2011US20110228597 Static Magnetic Field Assisted Resistive Sense Element
09/22/2011US20110228596 Spin memory and spin transistor
09/22/2011US20110228595 Memory Cell That Includes Multiple Non-Volatile Memories
09/22/2011US20110228594 Multi-Port Non-Volatile Memory that Includes a Resistive Memory Element
09/22/2011US20110228593 Memristive Device Based on Current Modulation by Trapped Charges
09/22/2011US20110228592 Programmable Bipolar Electronic Device
09/22/2011US20110228591 Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating
09/22/2011US20110228590 Resistance change memory
09/22/2011US20110228589 Resistance change memory
09/22/2011US20110228588 Nonvolatile memory device and method of programming the same
09/22/2011US20110228587 Nonvolatile semiconductor memory and manufacturing method of nonvolatile semiconductor memory
09/22/2011US20110228586 Nonvolatile semiconductor memory device
09/22/2011US20110228585 Variable resistance memory device and related method of operation
09/22/2011US20110228008 Printhead having relatively sized fluid ducts and nozzles
09/22/2011DE102010011749A1 Electronic device, has regulator receiving voltage of voltage region, where device switches regulator from one state into another state in response to failure condition of voltage region
09/21/2011EP2367201A2 Body contact for SRAM cell comprising double-channel transistors
09/21/2011EP2100307B1 Margined neighbor reading for non-volatile memory read operations including coupling compensation
09/21/2011EP1891583B1 A data storage device
09/21/2011EP1749300B1 Method and system for providing directed bank refresh for volatile memories
09/21/2011EP1661141B8 A polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric
09/21/2011CN1938781B Thin film memory device having a variable resistance
09/21/2011CN1866395B Magnetic memory device and magnetic memory device manufacturing method
09/21/2011CN102197482A Generating and exploiting an asymmetric capacitance hysteresis of ferroelectric MIM capacitors
09/21/2011CN102197433A Data protection during power-up in spin transfer torque magnetoresistive random access memory
09/21/2011CN102195618A Data holding device
09/21/2011CN102194848A Spin memory and spin transistor
09/21/2011CN102194757A Method of manufacturing semiconductor device, and semiconductor device
09/21/2011CN102194516A SRAM-type memory cell
09/21/2011CN102194515A On-die termination circuit, memory device, memory module, and method of operating and training an on-die termination
09/21/2011CN102194514A Fully balanced dual-port memory cell
09/21/2011CN102194513A Circuit, method and memory for automatically adjusting refresh frequency of memory
09/21/2011CN102194512A Memory component, memory device, and method of operating memory device
09/21/2011CN101458959B Data programming circuit and memory programming method
09/21/2011CN101432819B A method for reading a multilevel cell in a non-volatile memory device
09/21/2011CN101004947B Phase change memory device and program method thereof
09/20/2011US8024587 Computer apparatus, storage apparatus, system management apparatus, and hard disk unit power supply controlling method
09/20/2011US8024512 Memory controller and data processing system
09/20/2011US8023353 Semiconductor memory device, refresh control method thereof, and test method thereof
09/20/2011US8023352 Semiconductor storage device
09/20/2011US8023339 Pipe latch circuit and semiconductor memory device using the same
09/20/2011US8023336 Erase completion recognition
09/20/2011US8023335 Flash memory device and systems and reading methods thereof
09/20/2011US8023331 Semiconductor memory device including stacked gate having charge accumulation layer and control gate and method of writing data to semiconductor memory device
09/20/2011US8023330 Method of erasing a nonvolatile memory device
09/20/2011US8023325 Semiconductor memory having electrically erasable and programmable semiconductor memory cells
09/20/2011US8023324 Memory controller self-calibration for removing systemic influence
09/20/2011US8023323 Non-volatile memory device having monitoring memory cell and related method of driving using variable read voltage
09/20/2011US8023322 Non-volatile memory and method with reduced neighboring field errors
09/20/2011US8023320 Resistance-change random access memory device including memory cells connected to discharge elements